14
COMMERCIAL TEMPERATURE RANGE
IDT72V71643 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 4,096 x 4,096
TABLE 7 — FRAME INPUT OFFSET REGISTER (FOR) BITS
NOTE:
1. n denotes an input stream number from 0 to 31.
Name
(1)
Description
OFn2, OFn1, OFn0 These three bits define how long the serial interface receiver takes to recognize and store bit 0 from the RX input pin: i.e., to start a new frame.
(Offset Bits 2, 1 & 0) The input frame offset can be selected to +4.5 clock periods from the point where the external frame pulse input signal is applied to the F0i
input of the device. See Figure 7.
DLEn ST-BUS
®
mode: DLEn = 0, if clock rising edge is at the ¾ point of the bit cell.
(Data Latch Edge) DLEn = 1, if when clock falling edge is at the ¾ of the bit cell.
GCI mode: DLEn = 0, if clock falling edge is at the ¾ point of the bit cell.
DLEn = 1, if when clock rising edge is at the ¾ of the bit cell.
Reset Value: 0000
H for all FOR registers.
1514131211109876543210
OF32 OF31 OF30 DLE3 OF22 OF21 OF20 DLE2 OF12 OF11 OF10 DLE1 OF02 OF01 OF00 DLE0
FOR0 Register
1514131211109876543210
OF72 OF71 OF70 DLE7 OF62 OF61 OF60 DLE6 OF52 OF51 OF50 DLE5 OF42 OF41 OF40 DLE4
FOR1 Register
1514131211109876543210
OF112 OF111 OF110 DLE11 OF102 OF101 OF100 DLE10 OF92 OF91 OF90 DLE9 OF82 OF81 OF80 DLE8
FOR2 Register
1514131211109876543210
OF312 OF311 OF310 DLE31 OF142 OF141 OF140 DLE14 OF132 OF131 OF130 DLE13 OF122 OF121 OF120 DLE12
FOR3 Register
1514131211109876543210
OF192 OF191 OF190 DLE19 OF182 OF181 OF180 DLE18 OF172 OF171 OF170 DLE17 OF162 OF161 OF160 DLE16
FOR4 Register
1514131211109876543210
OF232 OF231 OF230 DLE23 OF222 OF221 OF220 DLE22 OF212 OF211 OF210 DLE21 OF202 OF201 OF200 DLE20
FOR5 Register
1514131211109876543210
OF272 OF271 OF270 DLE27 OF262 OF261 OF260 DLE26 OF252 OF251 OF250 DLE25 OF242 OF241 OF240 DLE24
FOR6 Register
1514131211109876543210
OF312 OF311 OF310 DLE31 OF302 OF301 OF300 DLE30 OF292 OF291 OF290 DLE29 OF282 OF281 OF280 DLE28
FOR7 Register
