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L6722 11 System control loop compensation
27/34
11 System control loop compensation
The control loop is composed by the Current Sharing control loop (See Figure 16) and the
Voltage control loop. Each loop gives, with a proper gain, the correction to the PWM in order to
minimize the error in its regulation: the Current Sharing control loop equalize the currents in the
inductors while the Voltage control loop fixes the output voltage equal to the reference.
Figure 16 shows the block diagram of the system control loop.
The system Control Loop is reported in Figure 17. The current information I
DROOP
sourced by
the DROOP pin flows into R
FB
implementing the dependence of the output voltage from the
read current (when DROOP is enabled).
Figure 16. Main control loop
The system can be modeled with an equivalent single phase converter which only difference is
the equivalent inductor L/3 (where each phase has an L inductor).
The Control Loop gain results (obtained opening the loop after the COMP pin):
Where:
● is the equivalent output resistance determined by the droop
function;
● Z
P
(s) is the impedance resulting by the parallel of the output capacitor (and its ESR) and
the applied load R
O
;
● Z
F
(s) is the compensation network impedance;
● Z
L
(s) is the parallel of the three inductor impedance;
● A(s) is the error amplifier gain;
L3
L2
L1
PWM3
PWM2
PWM1
4 / 5
Reference
ERROR AMPLIFIER
COMP FB
Z
F
(s) Z
F
(s)
I
DROOP
C
OUT
R
OUT
1 / 5
1 / 5
1 / 5
CURRENT SHARING
DUTY CYCLE
CORRECTION
I
INFO1
I
INFO3
I
INFO2
LOOP
s()
PWM Z
F
s() R
DROOP
Z
P
s()+()⋅⋅
Z
P
s() Z
L
s()+[]
Z
F
s()
As()
-------------- - 1
1
As()
----------- -+
⎝⎠
⎛⎞
R
FB
⋅+⋅
-----------------------------------------------------------------------------------------------------------------------
–=
DROOP
DCR
Rg
-------------
R
FB
⋅=
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