6.42
IDT70V3569S
High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges
7
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(VDD = 3.3V ± 150mV)
NOTE:
1. At V
DD < - 2.0V input leakages are undefined.
2. V
DDQ is selectable (3.3V/2.5V) via OPT pins. Refer to p.4 for details.
Symbol Parameter Test Conditions
70V3569S
UnitMin. Max.
|I
LI
| Input Leakage Current
(1 )
V
DDQ
= Max., V
IN
= 0V to V
DDQ
___
10 µA
|I
LO
| Output Leakage Current
CE
0
= V
IH
or CE
1
= V
IL
, V
OUT
= 0V to V
DDQ
___
10 µA
V
OL
(3.3V) Output Low Voltage
(2)
I
OL
= +4mA, V
DDQ
= Min.
___
0.4 V
V
OH
(3.3V) Output High Voltage
(2)
I
OH
= -4mA, V
DDQ
= Min. 2.4
___
V
V
OL
(2.5V) Output Low Voltage
(2)
I
OL
= +2mA, V
DDQ
= Min.
___
0.4 V
V
OH
(2.5V) Output High Voltage
(2)
I
OH
= -2mA, V
DDQ
= Min. 2.0
___
V
4831 tbl 08
NOTES:
1. These parameters are determined by device characterization, but are not
production tested.
2. 3dV references the interpolated capacitance when the input and output switch
from 0V to 3V or from 3V to 0V.
3. C
OUT also references CI/O.
Capacitance
(1)
(TA = +25°C, F = 1.0MHZ) PQFP ONLY
Symbol Parameter Conditions
(2)
Max. Unit
C
IN
Input Capacitance V
IN
= 3dV 8 pF
C
OUT
(3 )
Output Capacitance V
OUT
= 3dV 10.5 pF
4831 tbl 07
6.42
IDT70V3569S
High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges
8
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(3)
(VDD = 3.3V ± 150mV)
NOTES:
1. At f = f
MAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input
levels of GND to 3V.
2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby.
3. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
4. V
DD = 3.3V, TA = 25°C for Typ, and are not production tested. IDD DC(f=0) = 120mA (Typ).
5. CE
X = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDDQ - 0.2V
CE
X > VDDQ - 0.2V means CE0X > VDDQ - 0.2V or CE1X - 0.2V
"X" represents "L" for left port or "R" for right port.
70V3569S4
Com'l Only
70V3569S5
Com'l
& Ind
70V3569S6
Com'l Only
Symbol Parameter Test Condition Version Typ.
(4)
Max. Typ.
(4)
Max. Typ.
(4)
Max. Unit
I
DD
Dynamic Operating
Current (Both
Ports Active)
CE
L
and CE
R
= V
IL
,
Outputs Disabled,
f = f
MAX
(1)
COM'L S 375 460 285 360 245 310
mA
IND S
____ ____
285 415 245 360
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
= CE
R
= V
IH
f = f
MAX
(1)
COM'L S 145 190 105 145 95 125
mA
IND S
____ ____
105 175 95 150
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and CE
"B"
= V
IH
(5)
Active Port Outputs Disabled,
f=f
MAX
(1)
COM'L S 265 325 190 260 175 225
mA
IND S
____ ____
190 300 175 260
I
SB3
Full Standby Current
(Both Ports - CMOS
Level Inputs)
Both Ports CE
L
and
CE
R
> V
DDQ
- 0.2V,
V
IN
> V
DDQ
- 0.2V or V
IN
< 0.2V,
f = 0
(2)
COM'LS615615615
mA
IND S
____ ____
630630
I
SB4
Full Standby Current
(One Port - CMOS
Level Inputs)
CE
"A"
< 0.2V and
CE
"B"
> V
DDQ
- 0.2V
(5)
V
IN
> V
DDQ
- 0.2V or V
IN
< 0.2V,
Active Port, Outputs Disabled,
f = f
MAX
(1)
COM'L S 265 325 180 260 170 225
mA
IND S
____ ____
180 300 170 260
4831 tbl 09
6.42
IDT70V3569S
High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM Industrial and Commercial Temperature Ranges
9
AC Test Conditions
Figure 1. AC Output Test load.
Figure 2. Output Test Load
(For t
CKLZ, tCKHZ, tOLZ, and tOHZ).
*Including scope and jig.
Figure 3. Typical Output Derating (Lumped Capacitive Load).
Input Pulse Levels (Address & Controls)
Input Pulse Levels (I/Os)
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V/GND to 2.35V
GND to 3.0V/GND to 2.35V
3ns
1.5V/1.25V
1.5V/1.25V
Figures 1, 2, and 3
4831 tbl 10
1.5V/1.25
50Ω
50Ω
4831 drw 03
10pF
(Tester)
DATA
OUT
,
4831 drw 04
590Ω
5pF*
435Ω
3.3V
DATAOUT
,
833Ω
5pF*
770Ω
2.5V
DATAOUT
,
-1
1
2
3
4
5
6
7
20.5
30
50 80 100 200
10.5pF is the I/O capacitance of this
device, and 10pF is the AC Test Load
Capacitance.
Capacitance (pF)
ΔtCD
(Typical, ns)
4831 drw 05
,
·

70V3569S5BFI8

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 16K X 36 SYNCH DPRAM
Lifecycle:
New from this manufacturer.
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