6.42
11
IDT70P269/259/249L
Low Power 16K/8K/4K x 16 Dual-Port Static RAM Industrial Temperature Range
OCTOBER 16, 2008
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
(1)
Symbol Parameter
70P269/259/249
Unit
65 ns 90 ns
Min. Max. Min. Max..
ADM Port Write Cycle
(2)
t
WC
Write Cycle Time 65
____
90
____
ns
t
SCS
CS Low to Write End
65
____
90
____
ns
t
AVD
ADV Low Pulse
15
____
20
____
ns
t
AVDS
Address Set-up to ADV Rising Edge 15
____
20
____
ns
t
AVDH
Address Hold from ADV Rising Edge 3
____
5
____
ns
t
CSS
CS Set-up to ADV Rising Edge
7
____
10
____
ns
t
WRL
WE Pulse Width
28
____
45
____
ns
t
BW
UB/LB Low to Write End
28
____
45
____
ns
t
SD
Data Set-up to Write End 20
____
30
____
ns
t
HD
Data Hold from Write End 0
____
0
____
ns
t
LZWE
(3)
WE High to I/O Low-Z
0
____
0
____
ns
t
AVWE
ADV High to WE Low
0
____
0
____
ns
t
WODR
Write End to ODR Valid
____
40
____
60 ns
Standard Port Write Cycle
(4)
t
WC
Write Cycle Time 40
____
60
____
ns
t
SCS
CS Low to Write End
30
____
50
____
ns
t
AW
Address Valid to Write End 30
____
50
____
ns
t
HA
Address Hold to Write End 0
____
0
____
ns
t
SA
Address Set-up to Write Start 0
____
0
____
ns
t
WRL
Write Pulse Width 25
____
45
____
ns
t
SD
Data Set-up to Write End 20
____
30
____
ns
t
HD
Data Hold from Write End 0
____
0
____
ns
t
HZWE
(3)
WE Low to Data High-Z
____
15
____
25 ns
t
LZWE
(3)
WE High to Data Low-Z
0
____
0
____
ns
t
WODR
Write End to ODR Valid
____
40
____
60 ns
7146 tbl 13
NOTES:
1. VDD = 1.8V
2. ADM port timing applies to the left or right port when configured to ADM mode.
3. This parameter is guaranteed by design and is not tested.
4. Standard SRAM port timing applies to the left or right port when configured to standard SRAM mode.
