6.4222
IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs Commercial and Industrial Temperature Ranges
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and TRST.
Revision Number (31:28) 0x2 Reserved for version number.
IDT Device ID (27:12) 0x221, 0x223 Defines IDT part number 71T75702 and 71T75902, respectively.
IDT JEDEC ID (11:1) 0x33 Allows unique identification of device vendor as IDT.
ID Register Indicator Bit (Bit 0) 1 Indicates the presence of an ID register.
I5319 tbl 02
JTAG Identification Register Definitions
Forces contents of the boundary scan cells onto the device
Places the boundary scan register (BSR) between TDI and TDO.
Places the boundary scan register (BSR) between TDI and TDO.
SAMPLE allows data from device inputs
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the boundary scan cells via the TDI.
Loads the JTAG ID register (JIDR) with the vendor ID code and places
Places the bypass register (BYR) between TDI and TDO. Forces all
device output drivers to a High-Z state.
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
VALIDATE and BYPASS instructions.
Uses BYR. Forces contents of the boundary scan cells onto the device
outputs. Places the bypass register (BYR) between TDI and TDO.
Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mandated by the IEEE std. 1149.1 specification.
The BYPASS instruction is used to truncate the boundary scan register
as a single bit in length.
Available JTAG Instructions
