6.426
IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs Commercial and Industrial Temperature Ranges
Absolute Maximum Ratings
(1)
TQFP Capacitance
(TA = +25
°°
°°
°C, f = 1.0MHz)
Pin Configuration 1M x 18
NOTES:
1. Pins 14 and 66 do not have to be connected directly to VSS as long as the
input voltage is < VIL.
2. Pin 16 does not have to be connected directly to VDD as long as the input voltage
is > VIH.
3. Pins 38, 39 and 43 will be pulled internally to VDD if not actively driven. To
disable the TAP controller without interfering with normal operation, several
settings are possible. Pins 38, 39 and 43 could be tied to VDD or VSS and
pin 42 should be left unconnected. Or all JTAG inputs (TMS, TDI and TCK)
pins38, 39 and 43 could be left unconnected “NC” and the JTAG circuit will
remain disabled from power up.
4. Pin 43 is reserved for the 36M address. JTAG is not offered in the 100-pin
TQFP package for the 36M ZBT device.
Top View
100 TQFP
NOTE:
1. This parameter is guaranteed by device characterization, but not production tested.
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VDD terminals only.
3. VDDQ terminals only.
4. Input terminals only.
5. I/O terminals only.
6. This is a steady-state DC parameter that applies after the power supply has
reached its nominal operating value. Power sequencing is not necessary;
however, the voltage on any input or I/O pin cannot exceed VDDQ during power
supply ramp up.
7. During production testing, the case temperature equals TA.
V
TERM
(2 )
Terminal Voltage with
Respect to GND
-0.5 to +3.6 -0.5 to +3.6
V
V
TERM
(3,6)
Terminal Voltage with
Respect to GND
-0.5 to V
DD
-0.5 to V
DD
V
V
TERM
(4,6)
Terminal Voltage with
Respect to GND
-0.5 to V
DD
+0.5 -0.5 to V
DD
+0.5
V
V
TERM
(5,6)
Terminal Voltage with
Respect to GND
-0.5 to V
DDQ
+0.5 -0.5 to V
DDQ
+0.5
V
T
A
(7 )
Operating Ambient
Temperature
0 to +70 -40 to +85
o
C
T
BIAS
Temperature Under Bias -55 to +125 -55 to +125
o
C
T
STG
Storage Temperature -55 to +125 -55 to +125
o
C
P
T
Power Dissipation 2.0 2.0 W
I
OUT
DC Output Current 50 50 mA
5319 tbl 06
10099989796959493929190 8786858483828189 88
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A
6
A
7
C
E
1
C
E
2
N
C
N
C
B
W
2
B
W
1
C
E
2
V
D
D
V
S
S
C
LK
R
/
W
C
E
N
O
E
A
D
V
/
LD
A
19
A
18
A
8
A
9
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
LB
O
A
15
A
14
A
13
A
12
A
11
V
D
D
V
S
S
A
0
A
1
A
2
A
3
A
4
A
5
NC
NC
V
DDQ
V
SS
NC
I/O
P2
I/O
15
I/O
14
V
SS
V
DDQ
I/O
13
I/O
12
V
SS
V
DD
I/O
11
I/O
10
V
DDQ
V
SS
I/O
9
I/O
8
NC
NC
V
SS
V
DDQ
NC
NC
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
NC
V
DDQ
V
SS
NC
I/O
P1
I/O
7
I/O
6
V
SS
V
DDQ
I/O
5
I/O
4
V
SS
V
DD
I/O
3
I/O
2
V
DDQ
V
SS
I/O
1
I/O
0
NC
NC
V
SS
V
DDQ
NC
NC
5319 drw 02a
V
SS
(1)
NC
NC
V
DD
(2)
NC
A
16
A
17
NC
V
SS
(1)
A
10
ZZ
,
N
C
/T
C
K
(3,4)
N
C
/T
D
O
(3)
N
C
/T
D
I
(3)
N
C
/T
M
S
(3)
BGA Capacitance
(TA = +25
°°
°°
°C, f = 1.0MHz)
fBGA Capacitance
(TA = +25
°°
°°
°C, f = 1.0MHz)
