OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

XR21V1410IL16-F

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30
XR21V1410
13
REV. 1.4.0
1-CH FULL-SPEED USB UART
2.1 UART Block Numbers
The table below lists the block numbers for accessing each of the UART channels and the UART Manager..
CDC_ACM_IF
SEND_BREAK
0x21 35 val
LSB
val
MSB
0, 2,
4, 6
0 0 0
Send a break for the speci-
fied duration
XR_SET_REG 0x40 0 val 0 regis-
ter
block 0 0 Exar custom command: set
one 8-bit register
val: 8-bit register value
register address: see
Table 7
block number: see
Table 5
XR_GETN_REG 0xC0 1 0 0 regis-
ter
block count
LSB
count
MSB
Exar custom register: get
count 8-bit registers
register address: see
Table 7
block number: see
Table 5
T
ABLE
5: C
ONTROL
B
LOCKS
B
LOCK
N
AME
B
LOCK
N
UMBER
D
ESCRIPTION
UART 0 The configuration and control registers for the UART.
UART Manager 4 The control registers for the UART Manager. The UART Manager
enables/disables the TX and RX FIFOs for each UART.
I2C EEPROM 0x65 Accesses external EEPROM via I2C interface.
UART Custom 0x66 Custom UART control registers. Enables / disables for wide mode, low
latency mode and custom interrupt packet.
T
ABLE
4: S
UPPORTED
USB C
ONTROL
C
OMMANDS
N
AME
R
EQUEST
T
YPE
R
EQUEST
V
ALUE
I
NDEX
L
ENGTH
D
ESCRIPTION
XR21V1410
14
1-CH FULL-SPEED USB UART
REV. 1.4.0
3.0 REGISTER SET DESCRIPTION
The internal register set of the V1410 consists of 3 different blocks of registers: the UART Manager, UART
registers and UART miscellaneous registers. The UART Manager controls the TX and RX enables and FIFOs
of all UART channels. The UART registers configure and control the remaining UART channel functionality
with the exception of low latency mode, wide mode and custom interrupt packet enables in the UART custom
register block.
Registers are accessed only via the USB interface by the XR_SET_REG and XR_GET_REG commands listed
in Table 4. The register address offsets are given in Table 6, Table 7 and Table 15, and the register blocks
are given in Table 5.
3.1 UART Manager Registers
3.1.1 FIFO_ENABLE Registers
Enables the RX FIFO and TX FIFOs. For proper functionality, the UART TX and RX must be enabled in the
following order:
FIFO_ENABLE = 0x1 // Enable TX FIFO
UART_ENABLE = 0x3 // Enable TX and RX
FIFO_ENABLE = 0x3 // Enable RX FIFO
3.1.2 RX_FIFO_RESET and TX_FIFO_RESET Registers
Writing a non-zero value to these registers resets the FIFOs.
T
ABLE
6: UART M
ANAGER
R
EGISTERS
A
DDRESS
R
EGISTER
N
AME
B
IT
-7 B
IT
-6 B
IT
-5 B
IT
-4 B
IT
-3 B
IT
-2 B
IT
-1 B
IT
-0
0X10 FIFO_ENABLE 0 0 0 0 0 0 RX TX
0X18 RX_FIFO_RESET Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x1C TX_FIFO_RESET Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
XR21V1410
15
REV. 1.4.0
1-CH FULL-SPEED USB UART
3.2 UART Register Map
T
ABLE
7: UART R
EGISTERS
A
DDRESS
R
EGISTER
N
AME
B
IT
-7 B
IT
-6 B
IT
-5 B
IT
-4 B
IT
-3 B
IT
-2 B
IT
-1 B
IT
-0
0X00 Reserved 0 0 0 0 0 0 0 0
0X01 Reserved 0 0 0 0 0 0 0 0
0X02 Reserved 0 0 0 0 0 0 0 0
0X03 UART_ENABLE 0 0 0 0 0 0 RX TX
0X04 CLOCK_DIVISOR0 Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x05 CLOCK_DIVISOR1 Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
0x06 CLOCK_DIVISOR2 0 0 0 0 0 Bit-18 Bit-17 Bit-16
0x07 TX_CLOCK_MASK0 Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x08 TX_CLOCK_MASK1 Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
0x09 RX_CLOCK_MASK0 Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x0A RX_CLOCK_MASK1 Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10 Bit-9 Bit-8
0x0B CHARACTER_FORMAT Stop Parity Data Bits
0x0C FLOW_CONTROL
0 0 0 0
Half-
Duplex
Flow Control Mode Select
0x0D Reserved 0 0 0 0 0 0 0 0
0x0E Reserved 0 0 0 0 0 0 0 0
0x0F Reserved 0 0 0 0 0 0 0 0
0x10 XON_CHAR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x11 XOFF_CHAR Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x12 LOOPBACK_CTL 0 0 0 0 0 En 0 0
0x13 ERROR_STATUS Break
Status
Overrun
Error
Parity
Error
Framing
Error
Break
Error
0 0 0
0x14 TX_BREAK Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
0x15 RS485_DELAY 0 0 0 0 Delay
0x16 Reserved 0 0 0 0 0 0 0 0
0x17 Reserved 0 0 0 0 0 0 0 0
0x18 Reserved 0 0 0 0 0 0 0 0
0x19 Reserved 0 0 0 0 0 0 0 0
0x1A GPIO_MODE
0 0 0 0
RS485
Polarity
Mode Select
0x1B GPIO_DIRECTION 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1C GPIO_INT_MASK 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1D GPIO_SET 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1E GPIO_CLEAR 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
0x1F GPIO_STATUS 0 0 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30

XR21V1410IL16-F

Mfr. #:
Buy XR21V1410IL16-F
Manufacturer:
MaxLinear
Description:
USB Interface IC 1-Ch 12Mbps 48MHz Internal clock; UART
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet