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AD9944KCPZRL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
Complete 10-Bit and 12-Bit, 25 MHz
CCD Signal Processors
Data Sheet
AD9943/AD9944
FEATURES
25 MSPS correlated double sampler (CDS)
6 dB to 40 dB 10-bit variable gain amplifier (VGA)
Low noise optical black clamp circuit
Preblanking function
10-bit (AD9943), 12-bit (AD9944) 25 MSPS A/D converter
No missing codes guaranteed
3-wire serial digital interface
3 V single-supply operation
Space-saving 32-lead 5 mm × 5 mm LFCSP package
APPLICATIONS
Digital still cameras
Digital video camcorders
PC cameras
Portable CCD imaging devices
CCTV cameras
GENERAL DESCRIPTION
The AD9943/AD9944 are complete analog signal processors
for CCD applications. They feature a 25 MHz single-channel
architecture designed to sample and condition the outputs of
interlaced and progressive scan area CCD arrays. The signal
chain for the AD9943/AD9944 consists of a correlated double
sampler (CDS), a digitally controlled variable gain amplifier
(VGA), and a black level clamp. The AD9943 offers 10-bit
ADC resolution, while the AD9944 contains a true 12-bit ADC.
The internal registers are programmed through a 3-wire
serial digital interface. Programmable features include gain
adjustment, black level adjustment, input clock polarity, and
power-down modes. The AD9943/AD9944 operate from a
single 3 V power supply, typically dissipate 79 mW, and are
packaged in space-saving 32-lead LFCSP packages.
FUNCTIONAL BLOCK DIAGRAM
F
igure 1. Functional Block Diagram
DATACLKSHDSHP
BAND GAP
REFERENCE
DOUT
CCDIN
PBLK
REFT
REFB
INTERNAL
TIMING
6dB–40dB
AVDD
DVDD
DVSS
AVSS
DRVDD
DRVSS
10
DIGITAL
INTERFACE
SDATASCKSL
CLPOB
10/12
CDS
VGA
CLP
AD9943/AD9944
CONTROL
REGISTERS
10-/12-BIT
ADC
02905-B-001
Rev. C Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2004–2014 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
AD9943/AD9944 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
General Specifications ................................................................. 3
Digital Specifications ................................................................... 3
AD9943 System Specifications ................................................... 3
AD9944 System Specifications ................................................... 4
Timing Specifications .................................................................. 5
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Terminolog y ...................................................................................... 9
Equivalent Input Circuits .............................................................. 10
Typical Performance Characteristics ........................................... 11
Internal Register Map .................................................................... 12
Serial Interface ................................................................................ 13
Circuit Description and Operation .............................................. 14
DC Restore .................................................................................. 14
Correlated Double Sampler ...................................................... 14
Optical Black Clamp .................................................................. 14
A/D Converter ............................................................................ 15
Variable Gain Amplifier ............................................................ 15
CCD Mode Timing ........................................................................ 16
Applications Information .............................................................. 17
Internal Power-On Reset Circuitry .......................................... 18
Grounding and Decoupling Recommendations .................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide ............................................................................... 19
REVISION HISTORY
3/14—Rev. B to Rev. C
Added Exposed Pad Notation, Figure 2 and Table 6 ................... 7
Added Exposed Pad Notation, Figure 3 and Table 7 ................... 8
Changes to Figure 17 ...................................................................... 17
Changes to Figure 18 ...................................................................... 18
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 19
5/04—Data Sheet Changed from Rev. A to Rev. B
Updated Format .................................................................. Universal
Updated Outline Dimensions ....................................................... 20
Changes to Ordering Guide .......................................................... 20
5/03—Data Sheet changed from Rev. 0 to Rev. A
Added AD9944 ................................................................... Universal
Changes to Features Section............................................................ 1
Updated Ordering Guide ................................................................. 5
Replaced TPC 3 ................................................................................. 9
Added Figure 12.............................................................................. 15
Updated Outline Dimensions ....................................................... 16
Rev. C | Page 2 of 20
Data Sheet AD9943/AD9944
SPECIFICATIONS
GENERAL SPECIFICATIONS
T
MIN
to T
MAX
, AVDD = DVDD = DRVDD = 3 V, f
SAMP
= 25 MHz, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit
TEMPERATURE RANGE
Operating −20 +85 °C
Storage −65 +150 °C
POWER SUPPLY VOLTAGE
Analog, Digital, Digital Driver 2.7 3.6 V
POWER CONSUMPTION
Normal Operation 79 mW
Power-Down Mode 150 µW
MAXIMUM CLOCK RATE 25 MHz
DIGITAL SPECIFICATIONS
DRVDD = DVDD = 2.7 V, C
L
= 20 pF, unless otherwise noted.
Parameter Symbol Min Typ Max Unit
LOGIC INPUTS
High Level Input Voltage V
IH
2.1 V
Low Level Input Voltage V
IL
0.6 V
High Level Input Current I
IH
10 µA
Low Level Input Current
I
IL
10
Input Capacitance C
IN
10 pF
LOGIC OUTPUTS
High Level Output Voltage, I
OH
= 2 mA
V
OH
2.2
Low Level Output Voltage, I
OL
= 2 mA V
OL
0.5 V
AD9943 SYSTEM SPECIFICATIONS
T
MIN
to T
MAX
, AVDD = DVDD = DRVDD = 3 V, f
SAMP
= 25 MHz, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Conditions
CDS
Maximum Input Range before Saturation
1
1.0 V p-p
Allowable CCD Reset Transient
1
500 mV See input waveform in footnote.
Maximum CCD Black Pixel Amplitude
1
100 mV
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution 1024 Steps
Gain Monotonicity Guaranteed
Gain Range
Minimum Gain 5.3 dB See Figure 13 for VGA gain curve.
Maximum Gain 40 41.5 dB
See Variable Gain Amplifier section for VGA
gain equation.
BLACK LEVEL CLAMP
Clamp Level Resolution 256 Steps
Clamp Level Measured at ADC output.
Minimum Clamp Level 0 LSB
Maximum Clamp Level
63.75
LSB
Rev. C | Page 3 of 20
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

AD9944KCPZRL

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Analog Front End - AFE 12-Bit 25 MHz CCD Signal Processor
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