AD9943/AD9944 Data Sheet
INTERNAL REGISTER MAP
All register values default to 0x000 at power-up except clamp level, which defaults to 128 decimal (AD9943 = 32 LSB clamp level, and
AD9944 = 128 LSB clamp level).
Table 8.
Address Bits
Register Name A2 A1 A0 Data Bits Function
Operation 0 0 0 D0 Software Reset (0 = normal operation, 1 = reset all registers to default).
D2, D1 Power-Down Modes (00 = normal power, 01 = standby, 10 = total shutdown).
D3 OB Clamp Disable (0 = clamp on, 1 = clamp off).
D5, D4 Test Mode. Should always be set to 00.
D6 PBLK Blanking Level (0 = blank output to zero, 1 = blank to ob clamp level).
D8, D7 Test Mode 1. Should always be set to 00.
D11 to D9 Test Mode 2. Should always be set to 000.
Control 0 0 1 D0 SHP/SHD Input Polarity (0 = active low, 1 = active high).
D1 DATACLK Input Polarity (0 = active low, 1 = active high).
D2 CLPOB Input Polarity (0 = active low, 1 = active high).
D3 PBLK Input Polarity (0 = active low, 1 = active high).
D4 Three-State Data Outputs (0 = outputs active, 1 = outputs three-stated).
Data Output Latching (0 = latched by DATACLK, 1 = latch is transparent).
D6 Data Output Coding (0 = binary output, 1 = gray code output).
D11 to D7 Test Mode. Should always be set to 00000.
OB Clamp Level (AD9943: 0 = 0 LSB, 255 = 63.75 LSB,
AD9944: 0 = 0 LSB, 255 = 255 LSB).
VGA Gain 0 1 1 D9 to D0 VGA Gain (0 = 6 dB, 1023 = 40 dB).
Rev. C | Page 12 of 20
