3 of 30 May 4, 2004
IDT 79RC32332
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2KB of 2-way set associative data cache, capable of write-back
and write-through operation.
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Cache locking per line to speed real-time systems and critical
system functions
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On-chip TLB to enable multi-tasking in modern operating
systems
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EJTAG interface to enable sophisticated low-cost in-circuit
emulation.
Synchronous-DRAM Interface
The RC32332 integrates a SDRAM controller which provides direct
control of system SyncDRAM running at speeds to 75MHz.
Key capabilities of the SDRAM controller include:
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Direct control of 4 banks of SDRAM (up to 2 64-bit wide DIMMs)
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On-chip page comparators optimize access latency.
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Speeds to 75MHz
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Programmable address map.
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Supports 16, 64, 128, 256, or 512Mb SDRAM devices
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Automatic refresh generation driven by on-chip timer
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Support for discrete devices, SODIMM, or DIMM modules.
Thus, systems can take advantage of the full range of commodity
memory that is available, enabling system optimization for cost, real-
estate, or other attributes.
Local Memory and I/O Controller
The local memory and I/O controller implements direct control of
external memory devices, including the boot ROM as well as other
memory areas, and also implements direct control of external periph-
erals.
The local memory controller is highly flexible, allowing a wide range
of devices to be directly controlled by the RC32332 processor. For
example, a system can be built using an 8-bit boot ROM, 16-bit FLASH
cards (possibly on PCMCIA), a 32-bit SRAM or dual-port memory, and a
variety of low-cost peripherals.
Key capabilities include:
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Direct control of EPROM, FLASH, RAM, and dual-port memories
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6 chip-select outputs, supporting up to 8MB per memory space
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Supports mixture of 8-, 16-, and 32-bit wide memory regions
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Flexible timing protocols allow direct control of a wide variety of
devices
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Programmable address map for 2 chip selects
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Automatic wait state generation.
PCI Bus Bridge
In order to leverage the wide availability of low-cost peripherals for
the PC market as well as to simplify the design of add-in functions, the
RC32332 integrates a full 32-bit PCI bus bridge. Key attributes of this
bridge include:
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50 MHz operation
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PCI revision 2.2 compliant
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Programmable address mappings between CPU/Local memory
and PCI memory and I/O
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On-chip PCI arbiter
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Extensive buffering allows PCI to operate concurrently with local
memory transfers
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Selectable byte-ordering swapper.
On-Chip DMA Controller
To minimize CPU exception handling and maximize the efficiency of
system bandwidth, the RC32332 integrates a very sophisticated
4-channel DMA controller on chip.
The RC32332 DMA controller is capable of:
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Chaining and scatter/gather support through the use of a
flexible, linked list of DMA transaction descriptors
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Capable of memory<->memory, memory<->I/O, and
PCI<->memory DMA
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Unaligned transfer support
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Byte, halfword, word, quadword DMA support.
On-Chip Peripherals
The RC32332 also integrates peripherals that are common to a wide
variety of embedded systems.
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Single 16550 compatible UART.
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SPI master mode interface for direct interface to EEPROM,
A/D, etc.
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Interrupt Controller to speed interrupt decode and management
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Four 32-bit on-chip Timer/Counters
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Programmable I/O module
Debug Support
To facilitate rapid time to market, the RC32332 provides extensive
support for system debug.
First and foremost, this product integrates an EJTAG in-circuit
emulation module, allowing a low-cost emulator to interoperate with
programs executing on the controller. By using an augmented JTAG
interface, the RC32332 is able to reuse the same low-cost emulators
developed around the RC32364 CPU.
