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TCC-202A-RT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
TCC−202
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19
Table 16. RFFE COMMAND FRAME for Extended Register Write Command Sequence for DACs Loading Procedure
Description SSC Command Frame
<byte count>
Extended Register Wrrittee DAC A&BB&&CC
1 0 SA (3,0) 0 0 0 0 0 0 0 1 0 P
Data Frame
<starting address>
0 0 0 0 0 0 0 1 P
TC(7:0) P DAC A (6:0) P DAC_B (6:0) P BP
Register Read Command Sequence
MIPI−RFFE Read operation can access RFFE_STATUS register from TCC−202 device address 0x1A. Extended Register
Read command sequence is not supported.
Configuration Settings
Table 17. DAC CONFIGURATION (ENABLE MASK) at [0x00] Defaults shown as (x)
Bit 6 (1) Bit 5 (0) Bit 4 (0) Bit 3 (0) Bit 2 (0) Bit 1 (0)
Bit 0 (0)
SSE reserved reserved DAC A DAC B reserved reserved
SSE = 0 spread spectrum disabled, SSE = 1 spread spectrum enabled (default), this controls the average boost clock which is
nominally 2 MHz and spread between 0.8 MHz and 3.2 MHz when enabled (default).
Table 18. DAC MODE SETUP: DAC ENABLE
Bit3 Bit2 DAC A DAC B
0 0 Off Off (Default)
0 1 Off Enabled
1 0 Enabled Off
1 1 Enabled Enabled
Table 19. BOOST DAC MODE SETUP (VHV) at [0x10] (Notes 13, 14)
Bit 7* Bit 6* Bit 5* Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
VHV (V)
0 0 0 1 0 0 0 0 13
0 0 0 1 0 0 0 1 14
0 0 0 1 0 0 1 0 15
0 0 0 1 0 0 1 1 16
0 0 0 1 0 1 0 0 17
0 0 0 1 0 1 0 1 18
0 0 0 1 0 1 1 0 19
0 0 0 1 0 1 1 1 20
0 0 0 1 1 0 0 0 21
0 0 0 1 1 0 0 1 22
0 0 0 1 1 0 1 0 23
0 0 0 1 1 0 1 1 24 (Default)
0 0 0 1 1 1 0 0 25
0 0 0 1 1 1 0 1 26
0 0 0 1 1 1 1 0 27
0 0 0 1 1 1 1 1 28
13.Bit 4 is fixed at logic 1 for reverse software compatibility
14.VHV is recommended to be set at VDac Max + 2V for non−turbo operation and + 4V when turbo is used.
* Indicates reserved bits
TCC−202
www.onsemi.com
20
Table 20. POWER MODE BIT SETTING IN REGISTER [0X1C]
PM1 PM0 State Description
0 0 Active Boost Control Active, VHV set by Digital Interface
VOUT A, BEnabled and Controlled by Digital Interface (Default)
0 1 Startup Boost Control Active, VHV set by Digital Interface VOUT A, BDisabled
1 0 Low Power Digital Interface is Active While All Other Circuits are in Low Power Mode
1 1 Reserved State of Hardware Does Not Change
Table 21. EXTENDED REGISTER WRITE TO UPDATE DAC A, B
Description SSC Command Frame
Address Frame
Extended Registe
r
Write TC_INDX_L
and DAC A, B
Op Code <Byte Count> P <Starting Address>
P
1 0 SA [3,0] 0 0 0 0 0 0 1 0 P 0 0 0 0 0
0 0 1 P
Data Frame Data Frame Data Frame
BP
<Data 8−bit> P <Data 8−bit> P <Data 8−bit> P BP
Turbo−Charge P DAC_A [7,0] P DAC_B [7,0] P BP
Figure 15. Register Read Command Sequence
Table 22. REGISTER READ COMMAND
Description SSC
Command Frame
Read MIPI−RFFE
Status Register
1 0 SA[3:0] 0 1 1 1 1 0 1 0 P
BP
Description Data Frame
Read MIPI−RFFE
Status Register (Continued)
0 CFPE CLE AFPE DFPE RURE WURE BGE
BP
TCC−202
www.onsemi.com
21
Following picture shows TCC−202 and all the necessary external components
Figure 16. TCC−202 with External Components
C
HV
VIO
VDDA
L_BOOST VHV
TCC−202
I
VIO
I
VDDA
I
IND
C
BOOST
C
VIO
C
VREG
VREG
V
BATT
V
IO
R
FILT
C
VDDA
L
BOOST
I
BATT
OUT
A,B
C
DACA,B
D
SCH
Table 23. RECOMMENDED EXTERNAL BOM
Component Description Nominal Value Package Recommended P/N
CBOOST Boost Supply Capacitor, 10 V
1 mF
0402 TDK: C1005X5R1A105K
LBOOST Boost Inductor
15 mH
0603 TDK: VLS2010ET−150M, Sunlord
SPH201610H150MT
RFILT Filtering resistor, 5%
3.3 W
0402 Vishay : CRCW04023R30JNED
CVIO V
IO
Supply Decoupling, 10 V 100 nF 0201
Murata: GRM033R61A104ME15D
CAVDD V
AVDD
Supply Decoupling, 10 V
1 mF
0402 TDK: C1005X5R1A105K
CVREG V
VREG
Supply Decoupling, 10 V 220 nF 0201 TDK: C0603X5R1A224M
CHV Boost Tank Capacitor, 50 V 47 nF 1005 Murata: GRM155C71H473KE19
CdacA,B Decoupling Capacitor, 50 V (Note 15) 100 pF 0201 Murata: GRM0335C1H101JD01D
DSCH Rectifying Shottky diode (Note 16) 100 pF SOD−923/323 NSR0240P2T5G
15.Recommended for noise reduction only – not essential
16.The NSR0340HT1G device may also be used.
Table 24. ORDERING INFORMATION
Device Package Shipping
†
TCC−202A−RT RDL
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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TCC-202A-RT

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Manufacturer:
ON Semiconductor
Description:
Tuners 0TCCA BUMPED DIE WLC
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