ICS85314AGI-11 REVISION F SEPTEMBER 16, 2013 2 ©2013 Integrated Device Technology, Inc.
ICS85314I-11 Data Sheet LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number Name Type Description
1, 2 Q0, nQ0 Output Differential output pair. LVPECL interface levels.
3, 4 Q1, nQ1 Output Differential output pair. LVPECL interface levels.
5, 6 Q2, nQ2 Output Differential output pair. LVPECL interface levels.
7, 8 Q3, nQ3 Output Differential output pair. LVPECL interface levels.
9, 10 Q4, nQ4 Output Differential output pair. LVPECL interface levels.
11 V
EE
Power Negative supply pin.
12 CLK_SEL Input Pulldown
Clock select input. When HIGH, selects CLK1, nCLK1 inputs. When LOW,
selects CLK0, nCLK0 inputs. LVTTL / LVCMOS interface levels.
13 CLK0 Input Pulldown Non-inverting differential clock input.
14 nCLK0 Input Pullup Inverting differential clock input.
15 RESERVED Reserve Reserved pin.
16 CLK1 Input Pulldown Non-inverting differential clock input.
17 nCLK1 Input Pullup Inverting differential clock input.
18, 20 V
CC
Power Positive supply pins.
19 nCLK_EN Input Pulldown
Synchronizing clock enable. When LOW, clock outputs follow clock input. When
HIGH, Q outputs are forced low, nQ outputs are forced high.
LVTTL / LVCMOS interface levels.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
R
PULLUP
Input Pullup Resistor 51 k
R
PULLDOWN
Input Pulldown Resistor 51 k
