ICS85314AGI-11 REVISION F SEPTEMBER 16, 2013 5 ©2013 Integrated Device Technology, Inc.
ICS85314I-11 Data Sheet LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
Table 4D. LVPECL DC Characteristics, V
CC
= 2.375V to 3.8V; V
EE
= 0V, T
A
= -40°C to 85°C
NOTE 1: Outputs termination with 50 to V
CC
– 2V.
AC Electrical Characteristics
Table 5. AC Characteristics, V
CC
= 2.375V to 3.8V; V
EE
= 0V, T
A
= -40°C to 85°C
NOTE: All parameters measured at ƒ
OUT
unless otherwise noted.
NOTE: The cycle-to-cycle jitter on the input will equal the jitter on the output. The part does not add jitter.
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CC
– 1.4 V
CC
– 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CC
– 2.0 V
CC
– 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.6 1.0 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 700 MHz
tp
LH
Propagation Delay, Low to High;
NOTE 1
ƒ 700MHz 1.0 1.4 1.8 ns
tsk(o) Output Skew; NOTE 2, 3 30 ps
tjit
Buffer Additive Phase Jitter,
RMS
156.25MHz,
Integration Range: 12kHz - 20MHz
0.170 0.200 ps
644.53125MHz,
Integration Range: 12kHz - 20MHz
0.060 0.200 ps
tsk(pp) Part-to-Part Skew; NOTE 3, 4 350 ps
t
S
Setup Time nCLK_EN to CLK 50 ps
t
H
Hold Time nCLK_EN to CLK 50 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 200 700 ps
odc Output Duty Cycle Skew ƒ 700MHz 45 55 %
