ICS85314AGI-11 REVISION F SEPTEMBER 16, 2013 20 ©2013 Integrated Device Technology, Inc.
ICS85314I-11 Data Sheet LOW SKEW, 1-TO-5 DIFFERENTIAL-TO-2.5V, 3.3V LVPECL FANOUT BUFFER
Revision History Sheet
Rev Table Page Description of Change Date
A
T1
T2
2
2
4
7
8
Pin Description Table - Pin 14 & 17, nCLKx, deleted partial description and added Pullup in
the “Type” column.
Pin Characteristics Table - C
IN
changed 4pF max. to 4pF typical.
AMR - corrected Output rating.
Added Wiring the Differential Input to Accept Single Ended Levels section.
Added Differential Clock Input Interface section.
6/11/03
B
T5
1
5
6
8
9
Added Phase Noise bullet in Features section.
AC Characteristics Table - added RMS Phase Jitter.
Added Phase Jitter Plot.
Updated Termination for 3.3V LVPECL Output diagrams.
Added Termination for 2.5V LVPECL Output section.
8/11/04
BT1
T9
1
2
16
Features section - added Lead-Free bullet.
Pin Description Table - corrected CLK_SEL description.
Ordering Information Table - added ""Lead-Free"" part number for TSSOP package.
3/22/05
C
T5
1
5
Features section - changed Part-to-Part Skew from 250ps max. to 350ps max.
AC Characteristics table - changed Part-to-Part Skew from 250ps max. to 350ps max.
5/24/05
D
T4D 5
8
LVPECL DC Characteristics Table - changed V
OH
max from V
CC
- 1.0V to V
CC
- 0.9V.
Application Information Section - added Recommendations for Unused Input and Output
Pins.
9/23/05
E
T4C
T5
T9
4
5
9
17
Differential DC Characteristics Table - corrected typo in I
IH
row, nCLKx to 5uA from 150uA.
Added thermal note to AC Characteristics Table.
Updated “Wiring the Differential Input to Accept Single-ended Levels” section.
Ordering Information Table - added LF marking for SOIC package.
Converted datasheet format.
4/16/10
E T9 17 Ordering Information Table - corrected package in the Package Column. 5/4/10
F
T5
T9
1
5
6-7
8
10
12
19
Features Section - updated packaging bullet. Deleted RMS Phase Noise bullet
AC Characteristics Table - removed RMS Phase Noise specification, and added Buffer
Additive Phase Jitter specifications.
Removed RMS Phase Noise Plot, and replaced with Additive Phase Jitter plots.
Parameter Measurement Information - corrected Phase Noise diagram.
Updated Wiring the Differential Inputs to Accept Single-ended Levels application note.
Added 2.5V Differential Clock Input Interface application note.
Ordering Information Table - deleted leaded parts, deleted tape and reel count.
9/16/13