LTC4226IUD-2#PBF Datasheet LTC4226IMS-1#PBF, LTC4226IMS-2#PBF, LTC4226IUD-1#PBF | P13-P15

LTC4226

4226f

applicaTions inForMaTion

Overcurrent Fault

The LTC4226 manages overcurrent faults by differentiat-

ing between circuit breaker faults and current limit faults.

Typical applications have a load capacitor to filter the load

current. A large load capacitor is an effective filter, but it

can increase MOSFET switch power dissipation at start-up

or during step up supply transients.

When the MOSFET is fully enhanced and the current is

below the current limit, the MOSFET power dissipation is

low and is determined by the R

DSON

and the switch cur-

rent. If the current is above the circuit breaker threshold

but below current limit, the circuit breaker CB comparator

activates a I

FTMR(CB)

pull-up current source at the FTMR pin.

When the channel current exceeds the current limit, the

CL amplifier activates the gate driver pull-down in a closed

loop manner. The excess GATE overdrive voltage is abruptly

discharged to the OUT pin until the sense voltage between

and SENSE drops below V

LIMIT

. This brief interval is

kept short by the fast responding amplifier to reduce the

excessive channel current. Next the CL amplifier servos

the GATE pin to maintain the sense voltage at V

LIMIT

During this current limit interval, the power dissipation

the MOSFET increases. The worst case switch power

dissipation occurs during a load short where the current

is set by the current limit with the entire supply voltage

appearing across the MOSFET. During active current limit-

ing, the FTMR pin is pulled up with I

FTMR(CL)

Dual-Rate Fault Timer

The fault timer pin FTMR, as illustrated in Figure 5 timing

waveforms, has a dual-rate fault pull-up that extends the

allowable duration of peak currents that are above the

circuit breaker threshold but below the current limit level.

When the load current exceeds the current limit threshold,

the power dissipation in the MOSFET may be high due

to the potentially large drain-to-source voltage. In this

condition, the FTMR pull-up current increases to reduce

the fault timer duration. When the load current is below

the current limit threshold, the power dissipation in the

MOSFET is less since the MOSFET is fully enhanced and

the drain-to-source voltage is small. Therefore, when the

current is below the current limit threshold but above the

circuit breaker threshold, the FTMR pull-up current is re-

duced. The MOSFET will turn off in a

fault condition where

the

average current is above the circuit breaker threshold,

but the dual-rate timer extends the allowable duration for

peak currents that remain below the current limit level.

The FTMR pin has comparators and four current sources

connected to an external capacitor C

. The four current

sources are: the default pull-down current I

FTMR(DEF)

the circuit breaker pull-up current source I

FTMR(CB)

, the

higher current limit pull-up current source I

FTMR(CL)

and

the reset pull-down current source I

FTMR(RST)

. When the

FTMR pin voltage exceeds the V

FTMR(H)

threshold, the

FTMR comparator signals a fault timeout.

The FTMR pin is held low in default normal mode whenever

the circuit breaker comparator, the current limit amplifier

and the reset are all inactive. The default mode has the

FTMR(DEF)

pull-down current source activated. When the

sense voltage exceeds the circuit breaker threshold V

but

is below V

LIMIT

, the circuit breaker comparator enables the

FTMR(CB)

pull-up current source and disables the I

FTMR(DEF)

current source. When the sense voltage reaches the V

LIMIT

threshold, the current limit amplifier activates the higher

FTMR(CL)

pull-up current source.

When the FTMR pin ramps up to V

FTMR(H)

, the FTMR(H)

comparator trips. The FAULT pin is asserted low and the

GATE to OUT voltage is discharged to turn off the MOSFET.

For the Auto-Retry option, the Auto-Retry internal timing

is initiated. The FTMR pin is asserted high at V

FTMR(H)

until the FTMR(L) comparator is reset low at V

FTMR(L)

the I

FTMR(RST)

pull-down source, which is activated by ON

low or UVLO or at the end of the Auto-Retry interval of

typically 0.5s. The FAULT pin goes high when the FTMR

4226 F05

FTMR

OUT

LIM

MOSFET

OFF

MODEST OVERLOAD

IGNORED

SEVERE OVERLOAD

SHUTS OFF

Figure 5. Dual-Rate Fault Timing

LTC4226

4226f

applicaTions inForMaTion

pin is pulled below V

FTMR(L)

. The GATE to OUT voltage

can ramp up for Auto-Retry mode if the ON pin is high

and V

is not in UVLO.

When the MOSFET current exceeds the circuit breaker

threshold but remains below the current limit the fault

time is given by:

= C

•

1.23V

FTMR(CB)

( )

When the current limit is active the fault time is given by:

LIMIT

= C

•

1.23V

FTMR(CL)

(3)

During active current limiting, a large MOSFET drain to

source voltage can appear, and t

LIMIT

should be selected

appropriately based on the worst MOSFET safe-operating-

area with the OUT pin shorted to ground.

A I

FTMR(RST)

pull-down source is active when resetting

the fault status. The current sources at the FTMR pin can

be overdriven externally. The FTMR pin can be pulled high

externally above V

FTMR(H)

to force a fault status or the FTMR

pin can be pulled low externally towards ground to force

a reset status. Both the FAULT and GATE pins behave the

same way for externally driven FTMR as described above

for internal mode. A prolonged external pull-down is not

recommended as it may mask normal FTMR operation.

Selecting Current Limit to Circuit Breaker Ratio

The ratio of the current limit voltage V

LIMIT

and circuit

breaker voltage V

can be configured to allow low duty

cycle, high crest factor load events like hard drive spin

up to operate above the maximum average load current

without invoking current limit. Avoiding current limit events

is a good practice as the load voltage is not glitched un-

necessarily by the current

limit amplifier

and the MOSFET

power dissipation is kept low. The unlatched CLS pin has

three input states (low, open and high). This pin config-

ures both Hot Swap channels simultaneously the preset

current limit voltage V

LIMIT

to approximately 1.5×, 2× or

3× of 1.15 • V

. However, higher current limit settings

will result in higher MOSFET power dissipation in the

event of a load short. Proper choice of the MOSFET must

accommodate high MOSFET power dissipation under the

worst case short-circuit. There are three I

FTMR(CL)

, each

corresponds with a V

LIMIT

selected by the CLS input. The

typical MOSFET SOA (safe operating area) has a constant

t characteristic for single narrow (<10ms) pulse dissipa-

tion. An increase in current (V

LIMIT

) for constant MOSFET

drain/source voltage results in square reduction in allowed

stress duration t

LIMIT

(or square increase in I

FTMR(CL)

The CLS pin is internally pulled to 1.23V. If it is driven

by a three-state output, the maximum allowable open-

circuit leakage is ±2µA. The driving output must source

or sink more than 10µA in the high or low state. If the

CLS trace crosses noisy digital signal lines, an RC filter

close to

the CLS pin will filter noise pickup (as shown in

Figure 1: R5/C3).

Auto-Retry vs Latchoff

The LTC4226-2 (automatic retry) version resets the FTMR

pin after a 0.5 second delay following a FTMR(H) com-

parator timeout if the V

voltage remains above the 4V

undervoltage lockout threshold V

CC(UVL)

and the ON pin

remains above its 1.23V V

threshold. This retry delay

can be terminated to force a 50ms delay restart by cycling

below the V

CC(UVL)

undervoltage threshold or a 10ms

delay restart by cycling the ON pin below the V

threshold.

The latchoff option (LTC4226-1) does not reset FTMR(L)

comparator automatically. It requires voltage cycling at

either the ON pin or the V

pin to reset FTMR pin.

Resetting Faults

The circuit breaker fault can be reset by cycling the ON pin

below and then above the ON comparator threshold. There

is a turn on delay of 10ms after the ON pin transitions high.

Alternatively, the V

pin can be cycled below and then

above the undervoltage lockout threshold to reset faults.

There is a turn on delay of 50ms after the V

pin exits

the undervoltage lockout.

The

FTMR pin reset begins with the FTMR pin pulled down

with 100µA to ground. This is followed by a start-up with

a 10µA FAULT pin pull-up and a 9µA GATE pin pull-up.

LTC4226

4226f

Fault Status

The FAULT status pin is active low with a 10µA current

source pull-up to a diode below its internal supply volt-

age, typically 5V for any V

>7V. When a fault occurs,

the FAULT pin pulls to ground with a 5mA limit. Although

the FAULT pin has the same voltage rating as the supply

pin, sinking LED current as in Figure 9 requires a series

resistor to reduce pin power dissipation.

The FAULT pin is also an unlatched input to synchronize

the MOSFET GATE. Pulling this pin externally below 0.3V

causes the GATE to shutoff immediately. This pin can

optionally be wire-ORed with other LTC4226's FAULT

pins to turn off their GATEs when one of the LTC4226

has a circuit breaker fault with the FTMR pin asserted at

FTMR(H)

. The other LTC4226's FTMR pin is unaffected by

the low external FAULT input. When the LTC4226 with fault

is reset (see section on auto-retry and resetting faults), the

wire-ORed FAULT pins return high and the GATEs revert

to their prior states. It is not recommended to connect an

LED to wire-ORed FAULT pins.

Daisy Chained Ports

Figure 7, illustrates FireWire

power distribution with

LTC4226

Hot Swap circuits and supply diode-ORing.

The Firewire devices can be power providers or power

consumers and can be daisy chained together.

In Figure 8, a 2-port device allows either port to be powered

internally through diode D1 or to be powered from the op-

posite port. The higher voltage source delivers power to the

external port devices and the internal FireWire controller

interface. This permits the host power to be shutdown while

the FireWire controller remains active with external power

provided by the port. The port can relay actively current

limited power as long as there are power sources in the

chain. More than two ports per device are possible permit-

ting power consumption or distribution among multiple

ports. The ports allow live plugging and unplugging with

port load capacitances as large as 1mF at 33V for Figure8.

The output port step up surge current is actively limited.

Figure 9 shows a 12V host power source application that

can drive a remote load capacitance up to 100µF with a

small MOSFET like the Si2318DS. 2mA rated LEDs can be

used as FAULT indicators with resistors to reduce power

dissipation at the FAULT pins.

Overvoltage Detection

The FTMR pin can be used to detect a V

overvoltage

condition with a Zener diode Z2 as shown in Figure 6.

Resistor R5 and Zener Z3 protect the FTMR pin from

excessive voltage while R6 provides a ground path. An

overvoltage at V

beyond 35V will pull the FTMR pin

above 1.23V through diode D2A and force a fault status.

If V

has a transient suppressor as shown in Figure 10,

the overvoltage threshold should be set at 35V which

is below the transient suppressor SMCJ33A minimum

breakdown voltage of 36.7V.

FTMR

D2A

1N4148

33V

4226 F06

Figure 6. V

Overvoltage Detection

applicaTions inForMaTion

Supply Transient Protection

All pins on the LTC4226 are tested for 44V operation with

the exception of FTMR and GATE. The GATE pins are volt-

age clamped either to OUT or GND while the FTMR pins

are low voltage. If greater than 44V supply transients are

possible, 33V transient suppressors are highly recom-

mended at the V

pins to clamp the voltage below the

55V absolute maximum voltage rating of the pins.

Output Positive Overvoltage Isolation

Transient voltage suppressors are adequate for clamping

short overvoltage pulses at the ports, but they may over-

heat if forced to sink large currents for extended periods.

Figure 10 shows how series MOSFETs can be used to

isolate positive port voltages up to the MOSFET V

BVDSS

Q3 and Q4 are turned off when the overvoltage detection

Zener Z2 pulls both FTMR1 and FTMR2 high through D2A

and D2B. The resistors R7 and R8 with MOSFETs Q5 and

Q6 facilitate restart by pulling up through the body diodes

of Q1 and Q2, respectively.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

LTC4226IUD-2#PBF

Mfr. #:

Buy LTC4226IUD-2#PBF

Manufacturer:

Analog Devices Inc.

Description:

Hot Swap Voltage Controllers 4.5V to 44V Dual Hot Swap Controller, Auto-Retry

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New from this manufacturer.

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LTC4226IUD-2#PBF

LTC4226IUD-2#PBF

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