LTC4226
4
4226f
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
Note 3: Limits on maximum rating is defined as whichever limit occurs
first. Internal clamps limit the GATE pin to a minimum of 12V above OUT, a
diode voltage drop below OUT, or a diode voltage drop below GND. Driving
the GATE to OUT pin voltage beyond the clamp may damage the device.
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, V
CC
= 12V.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Three-State Input
V
CLS(L)
CLS Pin Low Threshold Voltage
l
0.4 V
V
CLS(H)
CLS Pin High Threshold Voltage
l
2 V
V
CLS(Z)
CLS Pin Voltage in Open State 1.38 V
I
CLS(Z)
Allowable CLS Pin Leakage in Open State
l
±2 µA
I
CLS(L)
CLS Pin Low Input Current
l
–2 –4 –8 µA
I
CLS(H)
CLS Pin High Input Current
l
2 4 8 µA
Timing Delay
t
OFF(SENSE)
Severe Overcurrent Fault to GATE Low C
GATE
= 1nF, (V
CC
– SENSE = 4V)
l
0.1 1 µs
t
OFF(FAULT)
FAULT Input Low to GATE Low C
GATE
= 1nF
l
3 6 30 µs
t
OFF(FMTR)
FTMR High to GATE Low C
GATE
= 1nF
l
3 7 30 µs
t
OFF(ON)
ON Low to GATE Low C
GATE
= 1nF
l
25 60 µs
t
OFF(UVLO)
V
CC
Enters Undervoltage to GATE Low C
GATE
= 1nF
l
25 60 µs
t
ON(ON)
ON High to GATE High V
CC
Above Undervoltage
l
5 10 20 ms
Channel-to-Channel t
ON(ON)
Mismatch
l
±10 %
t
ON(UVL)
V
CC
Exits Undervoltage to GATE High ON High
l
25 50 100 ms
Channel-to-Channel t
ON(UVL)
Mismatch
l
±10 %
t
D(COOL)
Auto-Retry Delay LTC4226-2 Only
l
0.25 0.5 1 s
