AT29LV040A-15TC Datasheet AT29LV040A-15JI, AT29LV040A-15TI, AT29LV040A-25TI | P1-P3

Features

• Single Voltage, Range 3V to 3.6V Supply

• 3-volt Only Read and Write Operation

• Software Protected Programming

• Fast Read Access Time – 150 ns

• Low Power Dissipation

– 15 mA Active Current

– 40 µA CMOS Standby Current

• Sector Program Operation

– Single Cycle Reprogram (Erase and Program)

– 2048 Sectors (256 Bytes/Sector)

– Internal Address and Data Latches for 256 Bytes

• Two 16K Bytes Boot Blocks with Lockout

• Fast Sector Program Cycle Time – 20 ms Max

• Internal Program Control and Timer

• DATA Polling for End of Program Detection

• Typical Endurance > 10,000 Cycles

• CMOS and TTL Compatible Inputs and Outputs

• Commercial and Industrial Temperature Ranges

• Green (Pb/Halide-free) Packaging Option

1. Description

The AT29LV040A is a 3-volt only in-system Flash Programmable and Erasable Read

Only Memory (PEROM). Its 4 megabits of memory is organized as 524,288 words by

8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology,

the device offers access times to 150 ns, and a low 54 mW power dissipation. When

the device is deselected, the CMOS standby current is less than 40 µA. The device

endurance is such that any sector can typically be written to in excess of 10,000

times. The programming algorithm is compatible with other devices in Atmel’s 3-volt

only Flash memories.

To allow for simple in-system reprogrammability, the AT29LV040A does not require

high input voltages for programming. Three-volt-only commands determine the opera-

tion of the device. Reading data out of the device is similar to reading from an

EPROM. Reprogramming the AT29LV040A is performed on a sector basis; 256 bytes

of data are loaded into the device and then simultaneously programmed.

During a reprogram cycle, the address locations and 256 bytes of data are captured at

microprocessor speed and internally latched, freeing the address and data bus for

other operations. Following the initiation of a program cycle, the device will automati-

cally erase the sector and then program the latched data using an internal control

timer. The end of a program cycle can be detected by DATA

polling of I/O7. Once the

end of a program cycle has been detected, a new access for a read or program can

begin.

4-megabit

(512K x 8)

3-volt Only

256-byte Sector

Flash Memory

AT29LV040A

0334G–FLASH–2/05

AT29LV040A

2. Pin Configurations

2.1 32-lead PLCC Top View

2.2 32-lead TSOP (Type 1) Top View

Pin Name Function

A0 - A18 Addresses

Chip Enable

Output Enable

Write Enable

I/O0 - I/O7 Data Inputs/Outputs

NC No Connect

I/O0

A14

A13

A11

A10

I/O7

I/O1

I/O2

GND

I/O3

I/O4

I/O5

I/O6

A12

A15

A16

A18

VCC

A17

A11

A13

A14

A17

VCC

A18

A16

A15

A12

A10

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

0334G–FLASH–2/05

AT29LV040A

3. Block Diagram

4. Device Operation

4.1 Read

The AT29LV040A is accessed like an EPROM. When CE and OE are low and WE is high, the

data stored at the memory location determined by the address pins is asserted on the outputs.

The outputs are put in the high impedance state whenever CE

or OE is high. This dual-line con-

trol gives designers flexibility in preventing bus contention.

4.2 Software Data Protection Programming

The AT29LV040A has 2048 individual sectors, each 256 bytes. Using the software data protec-

tion feature, byte loads are used to enter the 256 bytes of a sector to be programmed. The

AT29LV040A can only be programmed or reprogrammed using the software data protection fea-

ture. The device is programmed on a sector basis. If a byte of data within the sector is to be

changed, data for the entire 256-byte sector must be loaded into the device. The AT29LV040A

automatically does a sector erase prior to loading the data into the sector. An erase command is

not required.

Software data protection protects the device from inadvertent programming. A series of three

program commands to specific addresses with specific data must be presented to the device

before programming may occur. The same three program commands must begin each program

operation. All software program commands must obey the sector program timing specifications.

Power transitions will not reset the software data protection feature, however the software fea-

ture will guard against inadvertent program cycles during power transitions.

Any attempt to write to the device without the 3-byte command sequence will start the internal

write timers. No data will be written to the device; however, for the duration of t

, a read opera-

tion will effectively be a polling operation.

After the software data protection’s 3-byte command code is given, a byte load is performed by

applying a low pulse on the WE

or CE input with CE or WE low (respectively) and OE high. The

address is latched on the falling edge of CE

or WE, whichever occurs last. The data is latched by

the first rising edge of CE

or WE.

The 256 bytes of data must be loaded into each sector. Any byte that is not loaded during the

programming of its sector will be erased to read FFH. Once the bytes of a sector are loaded into

the device, they are simultaneously programmed during the internal programming period. After

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

AT29LV040A-15TC

Mfr. #:

Buy AT29LV040A-15TC

Manufacturer:

Microchip Technology / Atmel

Description:

NOR Flash 4M (512kx8)

Lifecycle:

New from this manufacturer.

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AT29LV040A-15TC

AT29LV040A-15TC

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