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AT29LV040A
10. AC Read Waveforms
(1)(2)(3)(4)
Notes: 1. CE may be delayed up to t
ACC
- t
CE
after the address transition without impact on t
ACC
.
2. OE
may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
or by t
ACC
- t
OE
after an address change
without impact on t
ACC
.
3. t
DF
is specified from OE or CE whichever occurs first (CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
9. AC Read Characteristics
Symbol Parameter
AT29LV040A-15 AT29LV040A-20 AT29LV040A-25
UnitsMin Max Min Max Min Max
t
ACC
Address to Output Delay 150 200 250 ns
t
CE
(1)
CE to Output Delay 150 200 250 ns
t
OE
(2)
OE to Output Delay 0 50 0 100 0 120 ns
t
DF
(3)(4)
CE or OE to Output Float 0 30 0 50 0 60 ns
t
OH
Output Hold from OE, CE or Address,
Whichever Occurred First
00
0 ns
Note:
Not recommended for New Designs.
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AT29LV040A
11. Input Test Waveforms and Measurement Level
12. Output Test Load
Note: 1. These parameters are characterized and not 100% tested.
t
R
, t
F
< 5 ns
13. Pin Capacitance
f = 1 MHz, T = 25°C
(1)
Symbol Typ Max Units Conditions
C
IN
46pFV
IN
= 0V
C
OUT
812pFV
OUT
= 0V
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AT29LV040A
15. AC Byte Load Waveforms
(1)(2)
15.1 WE Controlled
15.2 CE Controlled
Notes: 1. The 3-byte address and data commands shown on the next page must be applied prior to byte loads.
2. A complete sector (256 bytes) should be loaded using these waveforms shown in these byte load waveform diagrams.
14. AC Byte Load Characteristics
Symbol Parameter Min Max Units
t
AS
, t
OES
Address, OE Set-up Time 10 ns
t
AH
Address Hold Time 100 ns
t
CS
Chip Select Set-up Time 0 ns
t
CH
Chip Select Hold Time 0 ns
t
WP
Write Pulse Width (WE or CE)200ns
t
DS
Data Set-up Time 100 ns
t
DH
, t
OEH
Data, OE Hold Time 10 ns
t
WPH
Write Pulse Width High 200 ns

AT29LV040A-15TC

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
NOR Flash 4M (512kx8)
Lifecycle:
New from this manufacturer.
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