6.42
IDT71V65603, IDT71V65803, 256K x 36, 512K x 18, 3.3V Synchronous SRAMS with
ZBT
Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
25
Timing Waveform of OE Operation
(1)
NOTE:
1. A read operation is assumed to be in progress.
Ordering Information
OE
DATA
OUT
t
OHZ
t
OLZ
t
OE
Valid
5304 drw 11
,
6.4226
IDT71V65603, IDT71V65803, 256K x 36, 512K x 18, 3.3V Synchronous SRAMs with
ZBT
Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges
Datasheet Document History
12/31/99 Created new datasheet from obsolete devices IDT71V656 and IDT71V658
03/04/00 Pg. 1,14,15 Removed 166MHz speed grade offering; Added 150MHz speed grade offering
04/20/00 Pg. 5,6 Added JTAG test pins to TQFP pin configuration; removed footnote
Pg. 5,6 Add clarification note to Recommended Operating temperature and Absolute Max Ratings tables
Pg. 7 Add note to BGA pin Configuration; correct typo within pinout
Pg. 21 Insert TQFP Package Diagram Outline
05/23/00 Add new package offering, 13 x 15mm 165 fBGA
Pg. 23 Correction in BG 119 Package Diagram Outline
07/28/00 Add industrial temperature
Pg. 2 Correction V
DDQ 3.3V I/O supply
Pg. 5-8 Remove JTAG offerings, refer to IDT71V656xx and IDT71V658xx device errata sheet
Pg. 7 Correct pin B2
Pg. 8 Change pin B1 to NC
Pg. 23 Update BG119 Package Diagram Outline
11/04/00 Pg. 8 Add note to pin N5 on BQ165 pinout, reserved for JTAG TRST
Pg. 15 Add Izz parameter to DC Electrical Characteristics
10/16/01 Pg. 16 Changed sub-header to include Commercial and Industrial Temperature Ranges. Corrected the TCH
from 22ns to 2.2ns and TSADV from 20ns to 2.0ns.
12/04/02 Pg. 1-25 Changed datasheet from Prelininary to final release.
Pg. 15 Added I temp to 150MHz.
Pg. 16 Corrected typo from 22 to 2.2.
12/19/02 Pg. 1,2,5,6, Removed JTAG functionality for current die revision.
7,8
Pg. 7 Corrected pin configuration on the x36, 119BGA. Switched pins I/O0 and I/OP1.
09/30/04 Pg. 5,6 Updated temperature TA note.
Pg. 7 Updated pin configuration for the 119BGA-reordered I/O signals on P7,N6,L6, K7,H6, G7, F6, E7, D6
(512K x18).
Pg. 25 Added "restricted hazardous substance device" to ordering information.
02/21/07 Pg. 25 Added Z generation die step to data sheet ordering information.
10/16/08 Pg. 25 Updated the ordering information by removing the "IDT" notation.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Rd 800-345-7015 or 408-284-8200 sramhelp@idt.com
San Jose, CA 95138 fax: 408-284-2775 408-284-4532
www.idt.com

71V65603S100PFG

Mfr. #:
Manufacturer:
IDT
Description:
SRAM 9M ZBT SLOW X36 P/L 3.3V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union