NCL30186
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27
Die Over Temperature (TSD)
The circuit stops operating if the junction temperature (T
J
)
exceeds 150°C typically. The controller remains off until T
J
goes below nearly 100°C.
Pin Connection Faults
The circuit addresses most pin connection fault cases:
• CS Pin Short to Ground
The circuit senses the CS pin impedance every time it
starts−up and after DRV pulses terminated by the 36−ms
maximum on−time. If the measured impedance does
not exceed 120 W typically, the circuit stops operating.
In practice, it is recommended to place a minimum of
250 W in series between the CS pin and the current
sense resistor to take into account parasitics.
• Fault of the GND Connection
If the GND pin is properly connected, the supply
current drawn from the positive terminal of the V
CC
capacitor, flows out of the GND pin to return to the
negative terminal of the V
CC
capacitor. If the GND pin
is not connected, the circuit ESD diodes offer another
return path. The accidental non−connection of the GND
pin is monitored by detecting that one of the ESD diode
is conducting. Practically, the ESD diode of CS pin is
monitored. If such a fault is detected for 200 ms, the
circuit stops generating DRV pulses.
More generally, incorrect pin connection situations
(open, grounded, shorted to adjacent pin) are covered by
ANDxxxx.
Fault Management
OFF Mode
The circuit turns off in the case of an incorrect feeding of the
circuit: “UVLO high”. The UVLO signal becomes high
when VCC drops below VCC(off) and remains high until
VCC exceeds VCC(on).
The circuit also turns off whenever a major faulty
condition prevents it from operating:
• Severe OTP (V
SD
level below V
OTP(off)
)
• V
CC
OVP
• OVP2 (additional OVP provided by SD pin)
• Output diode short circuit protection: “WOD_SCP
high”
• Output / Auxiliary winding Short circuit protection:
“Aux_SCP high”
• Die over temperature (TSD)
In this mode, the DRV pulses generation is interrupted.
In the case of a latching−off fault, the circuit stops pulsing
until the LED driver is unplugged and V
CC
drops below
V
CC(reset)
. At that moment, the circuit resumes operation.
In the auto−recovery case, the circuit cannot generate
DRV pulses for the auto−recovery 4−s delay. When this time
has elapsed, the circuit recovers operation as soon as the
V
CC
voltage has exceeded V
CC(on)
. In the B and D versions,
all these protections are auto−recovery. The SD pin OTP and
OVP, WOD_SCP and AUX_SCP functions are latching off
in the A and C versions (see Table 5).
Table 5. PROTECTION MODES
AUX_SCP WOD_SCP SD Pin OTP SD Pin OVP
NCL30186A* Latching off Latching off Latching off Latching off
NCL30186B Auto−recovery Auto−recovery Auto−recovery Auto−recovery
NCL30186C* Latching off Latching off Latching off Latching off
NCL30186D Auto−recovery Auto−recovery Auto−recovery Auto−recovery
ORDERING INFORMATION
Device Package Type Shipping
NCL30186ADR2G*
SOIC−8
(Pb−Free/Halide Free)
2500 / Tape & Reel
NCL30186BDR2G
NCL30186CDR2G*
NCL30186DDR2G
*Please contact local sales representative for availability
