NCL30186
www.onsemi.com
7
Table 4. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T
J
= 25°C, V
CC
= 12 V, V
ZCD
= 0 V,
V
CS
= 0 V, V
SD
= 1.5 V) For min/max values T
J
= −40°C to +125°C, V
CC
= 12 V)
Description UnitMaxTypMinSymbolTest Condition
CONSTANT CURRENT AND POWER FACTOR CONTROL
Error amplifier current capability
V
REFX
= V
REF
(no dimming)
V
REFX
= 25%* V
REF
I
EA
±60
±240
mA
COMP Pin Start−up Current Source COMP pin grounded I
EA_STUP
140
mA
LINE FEED FORWARD
V
VS
to I
CS(offset)
conversion ratio K
LFF
18 20 22
mS
Line feed−forward current on CS pin DRV high, V
VS
= 2 V I
FF
35 40 45
mA
Offset current maximum value I
offset(MAX)
80 100 120
mA
VALLEY LOCKOUT SECTION
Threshold for high− line range (HL) detection
V
VS
rising V
HL
2.28 2.40 2.52 V
Threshold for low−line range (LL) detection V
VS
falling V
LL
2.18 2.30 2.42 V
Blanking time for line range detection t
HL(blank)
15 25 35 ms
FREQUENCY FOLDBACK
Minimum additional dead time in frequency fold-
back mode
t
FF1LL
1.4 2.0 2.6
ms
Additional dead time V
REFX
= 5% V
REF
t
FF2HL
− 40 −
ms
Additional dead time V
REFX
= 0% V
REF
t
FF3HL
90 −
ms
FAULT PROTECTION
Thermal Shutdown (Note 6)
F
SW
= 65 kHz T
SHDN
130 150 170 °C
Thermal Shutdown Hysteresis T
SHDN(HYS)
− 50 – °C
Threshold voltage for output short circuit or aux.
winding short circuit detection
V
ZCD(short)
0.8 1.0 1.2 V
Short circuit detection Timer V
ZCD
< V
ZCD(short)
t
OVLD
70 90 110 ms
Auto−recovery timer duration t
recovery
3 4 5 s
SD pin Clamp series resistor R
SD(clamp)
1.6
kW
Clamped voltage SD pin open V
SD(clamp)
1.13 1.35 1.57 V
SD pin detection level for OVP V
SD
rising V
OVP
2.35 2.50 2.65 V
Delay before OVP or OTP confirmation T
SD(delay)
22.5 30.0 37.5
ms
Reference current for direct connection of an NTC
(Note 8)
I
OTP(REF)
80 85 90
mA
Fault detection level for OTP (Note 7) V
SD
falling V
OTP(off)
0.47 0.50 0.53 V
SD pin level for operation recovery after an OTP
detection
V
SD
rising V
OTP(on)
0.66 0.70 0.74 V
OTP blanking time when circuit starts operating
(Note 8)
t
OTP(start)
250 370
ms
SD pin voltage where thermal fold−back starts
(V
REF
is decreased)
V
TF(start)
0.94 1.00 1.06 V
SD pin voltage at which thermal fold−back stops
(V
REF
is clamped to V
REF50
)
V
TF(stop)
0.64 0.69 0.74 V
V
TF(start)
over I
OTP(REF)
ratio (Note 7) T
J
= +25°C to +125°C R
TF(start)
10.8 11.7 12.6
kW
6. Guaranteed by Design
7. A NTC is generally placed between the SD and GND pins. Parameters R
TF(start)
, R
TF(stop)
, R
OTP(off)
and R
OTP(on)
give the resistance the
NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after
an OTP situation.
8. At startup, when V
CC
reaches V
CC(on)
, the controller blanks OTP for more than 250 ms to avoid detecting an OTP fault by allowing the
SD pin voltage to reach its nominal value if a filtering capacitor is connected to the SD pin.
