MOTOROLA
MC92603 Quad and MC92604 Dual Gigabit Ethernet Transceivers
11
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Receiver Interface Timing Modes
The receiver interface is timed to the recovered clock or to the local reference clock, depending on the state
of the recovered clock enable, RCCE, signal. RCCE set high enables timing relative to the recovered clock,
set low enables timing relative to the reference clock. All receiver channels outputs are source synchronous.
They may be configured to be source aligned or source centered with their respective RECV_x_CLK
outputs.
Recovered Clock Timing Mode (RCCE = high)
When RCCE is set high, then RECV_REF_A is used to select the recovered clock to be used. If
RECV_REF_A is high, then Channel A’s recovered clock is used for all four channels. If it is low, then each
channel uses its own recovered clock.
In order to track a transmitter frequency that is offset from the receiver’s reference clock frequency, the duty
cycle and period of the recovered clock is modulated. The recovered clock duty cycle may be reduced or
increased by 200 ps (if nominal frequency is 125 Mhz) in order to match the transmitter frequency (if the
reference clock frequency is 125mhz, this means that the minimum recovered clock cycle time is 7.8ns and
the maximum recovered clock cycle is 8.2ns).
Reference Clock Timing Mode (RCCE = low)
Data is timed relative to the local reference clock when RCCE is low. Synchronization between the
recovered clock and the reference clock is handled by the receiver interface. Frequency offset between the
transmitter’s reference clock and the receiver’s reference clock causes overrun/underrun situations. Overrun
occurs when the transmitter is running faster than the receiver. Underrun occurs when the transmitter is
running slower than the receiver. The MC92603/4 performs rate adaption based on the context of the data
streams to prevent over and under run situations.
In an overrun situation, data must be dropped in order to maintain synchronization between the clock
domains. If add delete idle enable, ADIE, is high the receiver interface searches for the appropriate code
groups to drop when overrun is imminent. If the appropriate code groups are not available to drop, receiver
overrun may occur. When overrun occurs, the “Overrun” error is reported and data is dropped. Table 7
summarizes the rate adaption technique as a function of the receiver configuration when the receiver
reference clock is slower than the transmitter reference clock.
Table 6. Word Synchronization Events
Word Synchronization Event WSYNC1 WSYNC0
No word synchronization required LOW LOW
4 IDLE / 1 non-IDLE LOW HIGH
Disparity-based IDLE sequence HIGH LOW
Align to special control Character K28.3 (/A/) HIGH HIGH
Table 7. Receiver Reference clock is SLOWER than Transmitter Reference Clock
ADIE COMPAT Receive Mode Result Action Taken
Low Low N/A Overrun Two bytes of data are lost. First byte reports overrun,
second byte is skipped.
High Low N/A Data dropped 2 consecutive IDLEs (K28.5) are dropped.
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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