MC92603VF Datasheet MC92603VF, MC92604VM, MC92604ZT | P4-P6

MC92603 Quad and MC92604 Dual Gigabit Ethernet Transceivers

MOTOROLA

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

Figure 2. Phy and Backplane Application

Functional Summary

The transceivers send/receive differential data in one of two operating ranges. They may be operated in the

high range with a maximum data rate of 1 Gbps (1.25 gigabaud) or at a half-rate of 500 Mbps (625

megabaud). The data transfer rate is determined by the state of the half speed enable (HSE) input and the

frequency of the reference clock. Any frequency and resulting data rate with in the ranges shown in Table 1

may be used.

The reference clock inputs are differential LVPECL. Optionally, a single ended 3.3 Volt (LVCMOS/LVTTL)

input clock source may be used.

Table 1. Legal Reference Clock Frequency Ranges

HSE

Reference Frequency

Min. (MHz)

Reference Frequency

Max (MHz)

Link Transfer Rate

(Gigabaud)

Low 95.00 135.0 0.95 - 1.35

High 47.50 67.50 0.475 - 0.675

MC92603

Fiber

Backplane

•

MC92603

Switch Fabric Card

TBI/RTBI

Line Card – 4 Port – 1000BASE-X

GMII/RGMII

MC92603

Quad

Backplane

SERDES

Mac

Processors/

Memory/

ASICs

MAC

MC92603

Quad

Ethernet

PHY

Fiber

E/O

Line Card Application

with both

Gigabit Ethernet PHY

and

Backplane Applications

Frees

cale Semiconductor,

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

nc...

MOTOROLA

MC92603 Quad and MC92604 Dual Gigabit Ethernet Transceivers

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

Transmitter Functionality

The MC92603 and MC92604 are versatile devices that may be used in backplane or Ethernet PHY

applications. They may be conﬁgured in multiple data interface and operational modes. The following

sections provide a basic functional description of the transmitter, its operational modes and data interfaces.

Each transmitter takes data presented at its source synchronous parallel data input port, creates a

transmission code group or character (if not pre-encoded), and serially transmits the code group out of the

differential link output pads.

The transmitter driver is a controlled impedance driver. The impedance of the driver is programmable to 50-

or 75-

Ω

through the MEDIA conﬁguration signal. Drive impedance is 50-

Ω

when MEDIA is low and 75-

Ω

when high.

Interface Conﬁguration

The transmitter may operate in one of eight data interface conﬁgurations as shown in Table 2. The

compatibility conﬁguration pin, COMPAT, establishes operation in either the “backplane” mode or the

“Ethernet” compatible mode. The ten bit interface enable, TBIE, conﬁguration input determines if the

internal 8B/10B encoder will be used with uncoded input data or bypassed for a pre-encoded (coded) input

data. The DDR conﬁguration pin when enabled “reduces” the interface from an 8-/10-bit single data rate

interface to a 4-/5-bit double data rate interface.

The conﬁguration signals, TBIE and COMPAT, also affect the receiver’s conﬁguration.

Transmit data is sampled and stored in the input FIFO on the rising edge (single data rate) of the appropriate

transmit clock, if DDR is low, or both edges (double data rate) of the transmit clock if DDR is high. The

FIFO accepts data to be transmitted and synchronizes it to the internal clock domain.

The transmitter data interface operates at high frequency (nominally 125MHz). In order to ease

development of devices that interface with the Gigabit Ethernet transceivers, all transmitter data input

interfaces are source synchronous. The data for each channel has its own dedicated clock input. This allows

the clock at the source of the data to be routed with the data ensuring matched delay and timing. However,

if per-channel clock sources are not available or deemed unnecessary, all channels may be clocked by a

common clock source. The transceivers may be conﬁgured so that the channel A transmit clock is used as

the source synchronous clock for all four channels. All transmitter clock inputs and the reference clock

inputs must have identical frequencies, however, a phase shift of +/- 180

is tolerated.

Table 2. MC92603 Data Interface Modes

Data Interface Mode COMPAT TBIE DDR

Backplane 8-bit Uncoded Data Low Low Low

Backplane (4-bit reduced interface) Uncoded Data Low Low High

Backplane 10-bit Coded Data Low High Low

Backplane (5-bit reduced interface) Coded Data Low High High

Ethernet compatible GMII High Low Low

Ethernet compatible RGMII High Low High

Ethernet compatible TBI High High Low

Ethernet compatible RTBI High High High

Frees

cale Semiconductor,

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

nc...

MC92603 Quad and MC92604 Dual Gigabit Ethernet Transceivers

MOTOROLA

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

Backplane Application Modes (COMPAT = low)

Transmitting Uncoded Data - 8-/4-Bit Modes

The settings for the transmitter control signals when sending uncoded 8-bit or reduced interface 4-bit data

is shown in Table 3.

When XMIT_x_ENABLE is low, an IDLE (K28.5) code group of proper running disparity is generated. The

state of the XMIT_x_7-XMIT_x_0, XMIT_x_K, and XMIT_x_ERR signals are ignored. This allows the

link to maintain alignment when transmission of data is not needed.

When XMIT_x_ENABLE is high, uncoded data is presented in 8-/4-bit bytes to the input register through

the XMIT_x_7 through XMIT_x_0 signals. The uncoded data is coded into 10-bit transmission code groups

using an on-chip 8B/10B encoder. 8B/10B coding ensures DC balance across the link and sufﬁcient

transition density to facilitate reliable data and clock recovery. The XMIT_x_7 through XMIT_x_0 signals

are interpreted as normal data when the XMIT_x_K signal is low.

The 8B/10B code set includes 12 special control codes. Special control codes may be transmitted by setting

the XMIT_x_K high as indicated in Table 3. There are only 12 valid control code groups, if the data input

is other than the 12 deﬁned values then an illegal 10 bit code group will be generated and transmitted. This

will be detected by the receiver as a “Code Error”.

If XMIT_x_ERR is high then the 8B/10B encoder is forced to produce an invalid 10 bit code.

When using the device in a system where word alignment is required, it may be desirable to generate

disparity-style word synchronization events. Also, it may be necessary to generate a disparity-style sync

event for compatibility with legacy transceivers. A disparity style word synchronization event is generated

by setting the transmit data inputs to a hex AD and XMIT_x_K high for the appropriate transmitter(s). The

transmitter generates one of two unique 16-code group IDLE (K28.5) sequences depending on the current

running disparity:

I+, I+, I-, I-, I+, I-, I+, I-, I+, I-, I+, I-, I+, I-, I+, I- or

I-, I-, I+, I+, I-, I+, I-, I+, I-, I+, I-, I+, I-, I+, I-, I+

where I+ stands for IDLE

of positive disparity, and I- stands for IDLE

of negative disparity.

Transmitting Coded Data - 10-/5-Bit Modes

This operating mode is speciﬁed when the TBIE input is high. The state of COMPAT input does not affect

the transmitter operation.

Table 3. Transmitter Control States for Uncoded Data (TBIE=low)

XMIT_

_ENABLE XMIT_

_ERR XMIT_

_K Description

Low Don’t care Don’t care Transmit IDLE (K28.5), ignore data inputs.

High Low Low Transmit data present on data inputs.

High Low High Transmit control data present on data inputs.

High Low High Transmit disparity-style word synchronization event if the data

inputs = AD (hex). The transmitter inputs will be ignored while

sending these 16 code groups.

High High Don’t care Create an invalid 10 bit code group to be transmitted

Frees

cale Semiconductor,

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

nc...

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P16

MC92603VF

Mfr. #:

Buy MC92603VF

Manufacturer:

NXP Semiconductors

Description:

IC TXRX ETH QUAD GIG 256-MAPBGA

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MC92603VF

MC92603VF

Products related to this Datasheet