25 of 30 July 17, 2012
HYST Bit Decode
Bit 8 – SHDN-Shutdown. The thermal sensing device and A/D converters are disabled to save power, no events will be generated. When either of
the lock bits is set, this bit cannot be set until unlocked. However it can be cleared at any time. When in shutdown mode, the TSE2002GB2A1 still
responds to commands normally, however bus timeout may or may not be supported in this mode.
'0' (default); The temperature monitor is active and converting
'1'; The temperature monitor is disabled and will not generate interrupts or update the temperature data.
Bit 7 – TCRIT_LOCK; Locks the TCRIT Limit Register from being updated.
'0' (default; The TCRIT Limit Register can be updated normally.
'1'; The TCRIT Limit Register is locked and cannot be updated. Once this bit has been set, it cannot be cleared until an internal
power on reset.
Bit 6 – EVENT_LOCK; Locks the High and Low Limit Registers from being updated.
'0' (default); The High and Low Limit Registers can be updated normally.
'1'; The High and Low Limit Registers are locked and cannot be updated. Once this bit has been set, it cannot be cleared until
an internal power on reset.
Bit 5 – CLEAR; Clears the EVENT pin when it has been asserted. This bit is write only and will always read '0'.
'0'; does nothing
'1'; The EVENT
pin is released and will not be asserted until a new interrupt condition occurs. This bit is ignored if the device
is operating in Comparator Mode. This bit is self clearing.
Bit 4 – EVENT_STS; Indicates if the EVENT
pin is asserted. This bit is read only.
‘0' (default); The EVENT pin is not asserted.
'1'; The EVENT
pin is being asserted by the device.
Bit 3 – EVENT_CTRL; Masks the EVENT
pin from generating an interrupt. If either of the lock bits are set (bit 7 and bit 6), then this bit cannot be
altered.
'0' (default); The EVENT
pin is disabled and will not generate interrupts.
'1'; The EVENT pin is enabled.
Bit 2 – TCRIT_ONLY; Controls whether the EVENT
pin will be asserted from a high / low out-of-limit condition. When the EVENT_LOCK bit is set,
this bit cannot be altered.
'0' (default); The EVENT
pin will be asserted if the measured temperature is above the High Limit or below the Low Limit in
addition to if the temperature is above the TCRIT Limit.
'1'; The EVENT
pin will only be asserted if the measured temperature is above the TCRIT Limit.
Bit 1 – EVENT_POL; Controls the “active” state of the EVENT
pin. The EVENT pin is driven to this state when it is asserted.
HYST[1:0]
Hysteresis
10
0 0 Disable hysteresis (default)
0 1 1.5°C
1 0 3°C
1 1 6°C
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'0' (default); The EVENT pin is active low. The “active” state of the pin will be logical '0'.
'1'; The EVENT
pin is active high. The “active” state of the pin will be logical '1'.
Bit 0 – EVENT_MODE; Controls the behavior of the EVENT
pin. The EVENT pin may function in either comparator or interrupt mode.
'0'; The EVENT
pin will function in comparator mode.
'1'; The EVENT
pin will function in interrupt mode.
Temperature Register Value Definitions
Temperatures in the High Limit Register, Low Limit Register, TCRIT Register, and Temperature Data Register are expressed in two's complement
format. Bits B 12 through B2 for each of these registers are defined for all device resolutions as defined in the TRES field of the Capabilities Register,
hence a 0.25°C minimum granularity is supported in all registers. Examples of valid settings and interpretation of temperature register bits:
The TRES field of the Capabilities Register optionally defines higher resolution devices. For compatibility and simplicity, this additional resolution
affects only the Temperature Data Register but none of the Limit Registers. When higher resolution devices generate status or EVENT
changes, only
bits B12 through B2 are used in the comparison; however, all 11 bits (TRES[1-0] = 10) or all 12 bits (TRES[1-0] = 11) are visible in reads from the
Temperature Data Register.
When a lower resolution device is indicated in the Capabilities Register (TRES[1-0] = 00), the finest resolution supported is 0.5°C. When this is
detected, bit 2 of all Limit Registers should be programmed to 0 to assure correct operation of the temperature comparators.
High Limit Register
The temperature limit registers (High, Low, and TCRIT) define the temperatures to be used by various on-chip comparators to determine device
temperature status and thermal EVENTs. For future compatibility, unused bits “-” must be programmed as 0.
High Limit Register
The High Limit Register holds the High Limit for the nominal operating window. When the temperature rises above the High Limit, or drops below or
equal to the High Limit, then the EVENT
pin is asserted (if enabled). If the EVENT_LOCK bit is set as shown in the Configuration Register table), then
this register becomes read-only.
Temperature Register Coding Examples
B15~B0 (binary) Value Units
xxx0 0000 0010 11xx +2.75 °C
xxx0 0000 0001 00xx +1.00 °C
xxx0 0000 0000 01xx +0.25 °C
xxx0 0000 0000 00xx 0 °C
xxx1 1111 1111 11xx -0.25 °C
xxx1 1111 1111 00xx -1.00 °C
xxx1 1111 1101 01xx -2.75 °C
ADDR R/W B15/B7 B14/B6 B13/B5 B12/B4 B11/B3 B10/B2 B9/B1 B8/B0 Default
02 R/W
Sign 128 64 32 16
0000
8 4 2 1 0.5 0.25
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Low Limit Register
Low Limit Register
The Low Limit Register holds the lower limit for the nominal operating window. When the temperature drops below the Low Limit or rises up to meet
or exceed the Low Limit, then the EVENT
pin is asserted (if enabled). If the EVENT_LOCK bit is set as shown in the Configuration Register, then this
register becomes read-only.
TCRIT Limit Register
TCRIT Limit Register
The TCRIT Limit Register holds the TCRIT Limit. If the temperature exceeds the limit, the EVENT pin will be asserted. It will remain asserted until
the temperature drops below or equal to the limit minus hysteresis. If the TCRIT_LOCK bit is set as shown in the Configuration Register table, then
this register becomes read-only.
Temperature Data Register
Temperature Data Register
* Resolution defined based on value of TRES field of the Capabilities Register. Unused/unsupported bits will read as 0.
The Temperature Data Register holds the 10-bit + sign data for the internal temperature measurement as well as the status bits indicating which
error conditions, if any, are active. The encoding of bits B 12 through B0 is the same as for the temperature limit registers.
Bit 15 – TCRIT; When set, the temperature is above the TCRIT Limit. This bit will remain set so long as the temperature is above TCRIT and will
automatically clear once the temperature has dropped below the limit minus the hysteresis.
Bit 14 – HIGH; When set, the temperature is above the High Limit. This bit will remain set so long as the temperature is above the HIGH limit. Once
set, it will only be cleared when the temperature drops below or equal to the HIGH Limit minus the hysteresis.
Bit 13 – LOW; When set, the temperature is below the Low Limit. This bit will remain set so long as the temperature is below the Low Limit minus
the hysteresis. Once set, it will only be cleared when the temperature meets or exceeds the Low Limit.
ADDR R/W B15/B7 B14/B6 B13/B5 B12/B4 B11/B3 B10/B2 B9/B1 B8/B0 Default
03 R/W
Sign 128 64 32 16
0000
8 4 2 1 0.5 0.25
ADDR R/W B15/B7 B14/B6 B13/B5 B12/B4 B11/B3 B10/B2 B9/B1 B8/B0 Default
04 R/W
Sign 128 64 32 16
0000
8 4 2 1 0.5 0.25
ADDR R/W B15/B7 B14/B6 B13/B5 B12/B4 B11/B3 B10/B2 B9/B1 B8/B0 Default
05 R
TCRIT HIGH LOW Sign 128 64 32 16
N/A (0000)
8 4 2 1 0.5 0.25* 0.125* 0.0625*

TSE2002GB2A1NCG

Mfr. #:
Manufacturer:
IDT
Description:
Board Mount Temperature Sensors Temp Sensor with Integrated EEPROM for Memory
Lifecycle:
New from this manufacturer.
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