Data Sheet E1831E30 (Ver. 3.0)
17
EDB4064B3PB
Notes: 1. Input set-up/hold time for signal(CA0 – CA9, /CS).
2. CKE input setup time is measured from CKE reaching high/low voltage level to CK, /CK crossing.
3. CKE input hold time is measured from CK, /CK crossing to CKE reaching high/low voltage level.
4. Frequency values are for reference only. Clock cycle time (tCK) shall be used to determine device capabilities.
5. To guarantee device operation before the DDR2 Mobile RAM Device is configured a number of AC boot timing parame-
ters are defined in the Table 6 on page 13. Boot parameter symbols have the letter b appended, e.g. tCK during boot is
tCKb.
6. Frequency values are for reference only. Clock cycle time (tCK or tCKb) shall be used to determine device capabilities.
7. The DDR2 Mobile RAM will set some Mode register default values upon receiving a RESET (MRW) command as spec-
ified in “Mode Register Definition” in the individual DDR2 Mobile RAM data sheet.
8. The output skew parameters are measured with Ron default settings into the reference load.
9. These parameters should be satisfied with both specification, analog (ns) value and min. tCK.
10. All AC timings assume an input slew rate of 1V/ns.
11. Read, Write, and Input Setup and Hold values are referenced to VREF.
12. For low-to-high and high-to-low transitions the timing reference will be at the point when the signal crosses VTT. tHZ
and tLZ transitions occur in the same access time (with respect to clock) as valid data transitions. These parameters
are not referenced to a specific voltage level but to the time when the device output is no longer driving (for tRPST,
tHZ(DQS) and tHZ(DQ) ), or begins driving (for tRPRE, tLZ(DQS), tLZ(DQ) ). Figure 1 shows a method to calculate the
point when device is no longer driving tHZ(DQS) and tHZ(DQ), or begins driving tLZ(DQS), tLZ(DQ) by measuring the
signal at two different voltages. The actual voltage measurement points are not critical as long as the calculation is con-
sistent.
13. Measured from the start driving of DQS – /DQS to the start driving the first rising strobe edge.
14. Measured from the from start driving the last falling strobe edge to the stop driving DQS – /DQS.
15. tDQSCKDS is the absolute value of the difference between any two tDQSCK measurements (within a byte lane) within
a contiguous sequence of bursts within a 160ns rolling window. tDQSCKDS is not tested and is guaranteed by design.
Temperature drift in the system is < 10°C/s. Values do not include clock
jitter.
16. tDQSCKDM is the absolute value of the difference between any two tDQSCK measurements (within a byte lane) within
a 1.6µs rolling window. tDQSCKDM is not tested and is guaranteed by design. Temperature drift in the system is <
10°C/s. Values do not include clock jitter.
17. tDQSCKDL is the absolute value of the difference between any two tDQSCK measurements (within a byte lane) within
a 32ms rolling window. tDQSCKDL is not tested and is guaranteed by design. Temperature drift in the system is <
10°C/s. Values do not include clock jitter.
Figure 1 — tLZ and tHZ Method for Calculating Transition and Endpoints
tHZ(DQS), tHZ(DQ)
stop driving point = 2 x T1 - T2
VOL + 2x X mV
T1
T2
VOL + X mV
VOH - X mV
VOH - 2x X mV
tLZ(DQS), tLZ(DQ)
begin driving point = 2 x T1 - T2
VOL
VTT - Y mV
VOH
T2
T1
VTT - 2x Y mV
VTT + 2x Y mV
VTT + Y mV
VTT
VTT
Y
2x Y
actual waveform
X
2x X
The parameters tLZ(DQS), tLZ(DQ), tHZ(DQS), and tHZ(DQ) are defined as single-ended. The
timing parameters tRPRE and tRPST are determined from the differential signal DQS-/DQS.
