TEA19162T/2J Datasheet TEA19162T/2J, TEA19162CT/1J | P10-P12

Product data sheet Rev. 1 — 10 March 2016 10 of 30

NXP Semiconductors

TEA19162T

PFC controller

Before t1, the LLC (and/or PFC) is in a (latched) protection and pulls down the

SNSBOOST pin, which also disables the PFC.

When the mains voltage drops to below the brownout level (I

) and the time t

d(det)bo

(50 ms) expires (t1), the PFC enters the brownout protection mode. When, in the

brownout protection mode, the mains voltage increases again and exceeds the brownin

level (I

; t2), the PFC pulls up the SNSBOOST voltage to the V

pu(rst)SNSBOOST

level

(see Figure 6

). Because the V

pu(rst)SNSBOOST

level of the PFC exceeds the V

uvp(SNSBOOST)

level of the LLC, the LLC converter resets the protection mode. However, switching is still

inhibited as the SNSBOOST voltage remains below the start level (V

start(SNSBOOST)

) of the

LLC. The SUPIC voltage is still regulated to the V

start(SUPIC)

level of the LLC converter. To

ensure that the voltage at the SNSBOOST pin accurately reflects the output voltage of the

PFC, the PFC converter starts after a delay time (t

d(start)

) (t3). The start of the PFC

converter is followed by a start-up of the LLC converter (t4).

7.4 Power factor correction regulation

The power factor correction circuit operates in quasi-resonant or discontinuous

conduction mode with valley switching. The next primary stroke is only started when the

previous secondary stroke has ended and the voltage across the PFC MOSFET has

reached a minimum value. To detect transformer demagnetization and the minimum

voltage across the external PFC MOSFET switch, the voltage on the SNSAUX pin is

used.

Fig 6. Fast latch reset

DDD

GVWDUW

GPDLQER

//&

VWDUW683,&

 

VWDUWK\V683,&

 

9

683,&

616%2267

3)&

RII ZDLW

SURWHFWLRQ RQ

893

616%2267

3)&

//&

RXW

W

W

W

PDLQV

EURZQRXW

EURZQLQ

EURZQRXW

W

UHJ616%2267

 9

VFSVWRS

 9

SXUVW616%2267

 9

VWDUW616%2267

 

9

XYS616%2267

 

9

Product data sheet Rev. 1 — 10 March 2016 11 of 30

NXP Semiconductors

TEA19162T

PFC controller

7.4.1 Soft start (PFCSENSE pin)

To prevent audible transformer noise at start-up or during hiccup, the soft start function

slowly increases the transformer peak current (see Figure 7

At t1, all conditions to start up the PFC are fulfilled. The maximum voltage on the

SNSCUR pin is limited to V

start(soft)init

(125 mV). When the PFC starts switching, the

maximum SNSCUR voltage is increased to V

reg(oc)

within a time period of t

start(soft)

(3.62 ms) or until the t

regulation limits the on-time of the PFC external MOSFET.

7.4.2 t

control

The power factor correction circuit is operated in t

control. The resulting mains harmonic

reduction of a typical application is well within the class-D requirements.

The following circuits determine the on-time of the external PFC MOSFET:

• The error amplifier and the loop compensation which define the voltage on the

PFCCOMP pin. At V

tonzero(PFCCOMP)

(3.5 V), the on-time is reduced to zero. At

tonmax(PFCCOMP)

(1.93 V), the on-time is at a maximum.

• Mains compensation which uses the current through the SNSMAINS pin to represent

the mains input voltage level.

Fig 7. PFC start-up

616%2267

VWDUWVRIWLQLW

$7(3)&

UHJRF

616&85

W

W

W

DDD

VWDUWVRIW

Product data sheet Rev. 1 — 10 March 2016 12 of 30

NXP Semiconductors

TEA19162T

PFC controller

7.4.3 PFC error amplifier (PFCCOMP and SNSBOOST pins)

The boost voltage is divided using a high-ohmic resistive divider and is supplied to the

SNSBOOST pin. The transconductance error amplifier, which compares the SNSBOOST

voltage with an accurate trimmed reference voltage (V

reg(SNSBOOST)

) is connected to this

pin. The external loop compensation network on the PFCCOMP pin filters the output

current. In a typical application, a resistor and two capacitors set the regulation loop

bandwidth.

The transconductance of the error amplifier is not constant. To avoid triggering the OVP

during start-up and during a converter transient response, the transconductance is

increased to a level of I

gm(high)

starting at V

gm(high)start

(see Figure 8).

7.4.4 Valley switching and demagnetization (PFCAUX pin)

To ensure that the TEA19162T operates in discontinuous or quasi-resonant mode, the

PFC MOSFET is switched on after the transformer is demagnetized. To reduce switching

losses and ElectroMagnetic Interference (EMI), the next stroke is started when the PFC

MOSFET drain-source voltage is at its minimum (valley switching). The demagnetization

and valley detection are measured via the SNSAUX pin.

If no demagnetization signal is detected on the SNSAUX pin, the controller generates a

demagnetization signal (t

to(demag)

; 44.5 s typical) after the external MOSFET is switched

off.

If no valley signal is detected on the PFCAUX pin, the controller generates a valley signal

to(vrec)

; 3.8 s typical) after demagnetization is detected.

To protect the internal circuitry, for example during lightning events, connect a 5 k series

resistor (R

aux

; see Figure 13) to the PFCAUX pin. Also connect a 1 k (typical) external

sense resistor (R

SNSCUR

; see Figure 13) to the SNSCUR pin. To prevent incorrect

switching due to external disturbance, place the resistors close to the IC.

Fig 8. Transconductance of the PFC error amplifier

DDD

PKLJK

P9

JPKLJKVWDUW

RYSVWRS



3)&&203

$

616%2267

9

VLQN3)&&203

 



P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30

TEA19162T/2J

Mfr. #:

Buy TEA19162T/2J

Manufacturer:

NXP Semiconductors

Description:

Power Factor Correction - PFC TEA19162T/SO8//2/REEL 13 Q1 NDP

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

TEA19162T/2J

TEA19162T/2J

Products related to this Datasheet