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TEA19162T/2J

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30
TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 16 of 30
NXP Semiconductors
TEA19162T
PFC controller
7.5.1 Protections
When a protection is triggered in the PFC or the LLC, it can also disable the other
converter. For example, if an OVP is detected at the LLC, both converters are stopped.
Also, at initial start-up, the PFC disables the LLC converter until the brownin level of the
mains voltage is detected.
The SNSBOOST pin is used for the communication about such protection states. By
pulling down the SNSBOOST pin below the V
uvp(SNSBOOST)
level of the LLC converter, the
PFC can disable the LLC converter. Similarly, by pulling down the SNSBOOST pin below
the short protection level V
scp(stop)
of the PFC converter, the LLC can disable the PFC.
Table 3
in Section 7.3 gives an overview of all protections in the PFC converter. The PFC
protections that also disable the LLC are listed in the LLC-column.
When the mains voltage initially drops to below the brownout level and then increases to
above the brownin level, all protections of the PFC and the LLC are reset. A reset of all
protections is also communicated via the SNSBOOST pin by pulling it up to the
V
pu(rst)SNSBOOST
level (see Section 7.3.7).
The IC starts and remains in the protection mode until the mains brownin level is reached.
The IC current consumption is then at power-saving level.
7.5.2 PFC burst mode
Based on the output power level of the LLC converter, the LLC determines when the PFC
enters burst mode. During the burst mode, the LLC converter disables the PFC by
increasing the SNSBOOST voltage to between V
det(L)SNSBOOST
and V
det(H)SNSBOOST
(see Figure 11
). It ensures a soft start and a soft stop at the start and the end of a
switching period, respectively. This increase in the voltage on the SNSBOOST pin is
achieved by an additional current out of the LLC converter towards the SNSBOOST pin.
The additional current creates a positive voltage shift because of the external resistive
network at the SNSBOOST pin.
TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 17 of 30
NXP Semiconductors
TEA19162T
PFC controller
At t1, the current out of the LLC SNSBOOST pin (I
stop(burst)
) is activated and the voltage
on the SNSBOOST pin increases. When a 100 k external resistor R
SNSBOOST
between
the SNSBOOST pin and GND pin is used (see Figure 11
), the SNSBOOST voltage
increase is about 640 mV (= I
stop(burst)SNSBOOST
*R
SNSBOOST
). As due to this increase the
SNSBOOST voltage is between V
det(L)SNSBOOST
and V
det(H)SNSBOOST
levels (t2), the soft
stop of the PFC converter is started. In the soft stop state, the current out of the
PFCCOMP pin (I
ch(stop)soft
) is activated. At the end of the soft stop, the PFC enters the
energy safe state and stops switching (t3). The voltage at the PFCCOMP pin is clamped
at V
tonzero(PFCCOMP)
(3.5 V). It remains at this level during the energy safe state. As the
LLC converter operates continuously, even when the PFC is stopped, the PFC output
capacitor discharges.
When the PFC boost capacitor is discharged so much that the voltage on the SNSBOOST
pin drops by 100 mV (V
off(burst)
; t4), the internal current source in the LLC converter is
switched off. Because of the negative voltage drop at the SNSBOOST pin, the
SNSBOOST voltage drops below the regulation level (V
reg(SNSBOOST
); t5). The PFC starts
switching again (t6). When V
SNSBOOST
exceeds the LLC V
on(burst)max
level (2.37 V) again,
the internal current is reactivated and the PFC stops switching again.
a. Block diagram
b. Timing diagram
Fig 11. PFC burst mode
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TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 18 of 30
NXP Semiconductors
TEA19162T
PFC controller
The TEA19162T current consumption in the burst mode depends on whether the IC is
switching or not. During burst mode on-time and burst mode off-time, the current
consumption is at operating level and power-saving level, respectively.
7.5.3 Soft stop
A soft stop always precedes the PFC burst mode. It reduces audible noise of the
converter.
The internal current source activated in the LLC converter (see Figure 11
) pulls up the
voltage at the PFC SNSBOOST pin. When the SNSBOOST pin voltage is between
V
det(L)SNSBOOST
(2.8 V) and V
det(H)SNSBOOST
(3.23 V), the PFC soft stop begins. Then, a
PFC internal current source I
ch(stop)soft
is activated and the transconductance error
amplifier in the PFC control loop is switched off (see Figure 11
).
The activated current source provides a current of 32 A (I
ch(stop)soft
) out of the PFCCOMP
pin. This current slowly increases the voltage of the PFCCOMP pin, gradually reducing
the converter switching on-time. When the zero on-time is reached, the soft stop ends.
The zero on-time corresponds with the PFCCOMP pin voltage of V
tonzero(PFCCOMP)
(3.5 V).
The detection of the overvoltage on the SNSBOOST pin at the normal OVP level
(V
ovp(stop)
) is delayed for the time t
d(ovp)
(100 s). This additional delay is required to verify
if the system should stop immediately because of an OVP or via a soft stop when
activating the burst mode.
7.6 Driver (pin GATEPFC)
The driver circuit to the gate of the power MOSFET has a current sourcing capability of
600 mA and a current sink capability of 1.4 A typical. These capabilities allow a fast
turn-on and turn-off of the power MOSFET, ensuring efficient operation.
When the SUPIC voltage is below its start level, the internal keep-off circuitry of the PFC
driver pulls down the GATEPFC pin. The pulling down of the GATEPFC pin prevents that
an external power MOSFET is activated when the IC power supply is absent or when the
V
SUPIC
<V
start(SUPIC)
. The keep-off circuitry (see Figure 12) is supplied via the GATEPFC
pin. So, if the actual IC supply is absent or too low (V
SUPIC
<V
start(SUPIC)
), the circuit works
correctly.
Fig 12. Keep-off circuitry at the GATEPFC pin
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P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30

TEA19162T/2J

Mfr. #:
Buy TEA19162T/2J
Manufacturer:
NXP Semiconductors
Description:
Power Factor Correction - PFC TEA19162T/SO8//2/REEL 13 Q1 NDP
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