TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 13 of 30
NXP Semiconductors
TEA19162T
PFC controller
7.4.5 Frequency limitation
To optimize the transformer and minimize switching losses, the switching frequency is
limited to f
sw(PFC)max
. If the frequency for quasi-resonant operation exceeds the f
sw(PFC)max
limit, the system enters Discontinuous Conduction Mode (DCM). When the system is in
DCM, the PFC MOSFET switches on at a minimum voltage across the switch (valley
switching).
To ensure correct control of the PFC MOSFET under all circumstances, the minimum
off-time is limited at t
off(PFC)min
.
7.4.6 Mains voltage compensation (SNSMAINS pin)
The equation for the transfer function of a power factor corrector contains the square of
the mains input voltage. In a typical application, the result is a low bandwidth for low mains
input voltages. At high mains input voltages, the Mains Harmonic Reduction (MHR)
requirements may be hard to meet.
To compensate for the mains input voltage influence, the TEA19162T contains a
correction circuit. The input voltage is measured via the SNSMAINS pin
(see Section 7.3.2
) and the information is fed to an internal mains compensation circuit
(see Figure 1
). With this compensation, it is possible to keep the regulation loop
bandwidth constant over the full mains input range. The result is that a mains voltage
independent transient response on load steps is yielded, while still complying with class-D
MHR requirements.
In a typical application, an external circuitry at the PFCCOMP pin (see Section 7.4.3
) sets
the bandwidth of the regulation loop.
7.4.7 Active X-capacitor discharge
The TEA19162T provides an active X-capacitor discharge after the mains voltage is
disconnected. When the mains input voltage (and so also the measured current into the
SNSMAINS pin) increases (see Figure 9
, t2 t1), the system assumes the presence of a
mains voltage. When the mains voltage does not increase for a minimum period of t
d(dch)
,
the active X-capacitor discharge is activated (t3).
When the active X-capacitor discharge function is activated, the X-capacitor is discharged
via the external PFC MOSFET (see Figure 10
). To avoid any increase of the PFC output
voltage, the external PFC MOSFET is slowly turned on until a small current is detected via
the SNSCUR pin (see Figure 9
, t4). A slow increase of the GATEPFC voltage is achieved
via a current source (I
ch(GATEPFC)
) that slowly charges the external gate-source
capacitance of the external MOSFET.
When the voltage at the SNSCUR exceeds V
ch(stop)SNSCUR
level (10.5 mV), the voltage at
the GATEPFC pin slowly decreases by activating a current sink (I
dch(GATEPFC)
). As a
result, the gate-source capacitance of the external MOSFET is discharged. When the
voltage on the GATEPFC pin drops to below V
dch(stop)GATEPFC
level (0.7 V), the current
sink is switched off. The charge/discharge cycle is repeated after the period t
off(dch)
(t5). As
for a typical power MOSFET the duration of charge/discharge pulses on the GATEPFC
pin is shorter than 2 ms, T
p
(4 ms typical) defines the pulse repetition time.
