TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 4 of 30
NXP Semiconductors
TEA19162T
PFC controller
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2. Pin configuration
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Table 2. Pin description
Symbol Pin Description
GATEPFC 1 gate driver output for PFC
GND 2 ground
SNSCUR 3 programmable current sense input for PFC
SUPIC 4 supply voltage
SNSBOOST 5 sense input for PFC output voltage
SNSMAINS 6 sense input for mains voltage
PFCCOMP 7 frequency compensation pin for PFC
SNSAUX 8 input from auxiliary winding for demagnetization timing and valley
detection for PFC
TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 5 of 30
NXP Semiconductors
TEA19162T
PFC controller
7. Functional description
7.1 General control
The TEA19162T is a controller for a power factor correction circuit. Figure 3 shows a
typical configuration.
7.2 Supply voltage and start-up
When using the TEA19162T (PFC) together with the TEA19161T (LLC), connect the
SUPIC pin of the TEA19162T to the SUPIC pin of the TEA19161T. The LLC controller
then supplies the PFC either via the high-voltage supply pin of the TEA19161T (SUPHV)
or via the primary auxiliary winding.
To enable the PFC, the SUPIC voltage must exceed the V
start(SUPIC)
level (13 V typical).
Although the V
start(SUPIC)
level of the LLC is higher than the V
start(SUPIC)
level of the PFC,
the system ensures that both converters (PFC and LLC) start up at the same time.
Therefore, the LLC initially pulls down the SNSBOOST pin, disabling the PFC until the
SUPIC voltage reaches the V
start(SUPIC)
level of the LLC.
When both conditions are met and the SNSMAINS is above the brownin level, the PFC
starts up via an internal soft start (see Figure 4
).
Fig 3. TEA19162T typical configuration
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TEA19162T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1 — 10 March 2016 6 of 30
NXP Semiconductors
TEA19162T
PFC controller
The exact start-up sequence of the PFC depends on the availability of start-up conditions
(brownin level, V
start(SUPIC)
of the PFC, and I
en(PFC)
).
Before t1, the SUPIC voltage is below the UVP level of the PFC and LLC. When the LLC
reaches a minimum supply voltage level (t1), the LLC pulls down the SNSBOOST pin to
disable the PFC.
At t2, the SUPIC voltage reaches the start level of the PFC converter. However, as the
LLC pulls low the SNSBOOST to below the PFC short protection level, the PFC is still off.
When the mains voltage exceeds the brownin level, the PFC resets its latched protection
by pulling V
SNSBOOST
to the V
pu(rst)SNSBOOST
level (t3). However, the LLC returns it to the
protection mode. When at t4 the SUPIC voltage reaches the start level of the LLC, the
SNSBOOST is released. The SNSBOOST voltage increases because of the resistive
divider which is connected to the PFC bus voltage. To ensure that this voltage is
representative of the V
boost
voltage before the system actually starts to switch, an
additional delay (t
d(start)
; 3.62 ms) is active before the PFC starts switching (t5).
Another important condition for the PFC start is a precharge of the compensation circuitry
connected to the PFCCOMP pin. This condition is met when the current out of the
PFCCOMP pin < |I
en(PFCCOMP)
|.
When at t6 the SNSBOOST voltage reaches the start level of the LLC (V
start(SNSBOOST)
),
the LLC converter starts to switch.
Fig 4. Start-up of the PFC and LLC
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TEA19162T/2J

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Power Factor Correction - PFC TEA19162T/SO8//2/REEL 13 Q1 NDP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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