®
Technology
SiI 163B
PanelLink Receiver
Data Sheet
Document # SiI-DS-0055-C
SiI 163B PanelLink Receiver
Data Sheet
ii SiI-DS-0055-C
Silicon Image, Inc.
SiI-DS-0055-C
July 2005
Application Information
To obtain the most updated Application Notes and other useful information for your design, please visit the Silicon
Image web site at www.siimage.com, or contact your local Silicon Image sales office.
Copyright Notice
This manual is copyrighted by Silicon Image, Inc. Do not reproduce, transform to any other format, or
send/transmit any part of this documentation without the expressed written permission of Silicon Image, Inc.
Trademark Acknowledgment
Silicon Image, the Silicon Image logo, PanelLink
®
, TMDS
®
and the PanelLink
®
Digital logo are registered
trademarks of Silicon Image, Inc. VESA
®
is a registered trademark of the Video Electronics Standards
Association. All other trademarks are the property of their respective holders.
Disclaimer
This document provides technical information for the user. Silicon Image, Inc. reserves the right to modify the
information in this document as necessary. The customer should make sure that they have the most recent data
sheet version. Silicon Image, Inc. holds no responsibility for any errors that may appear in this document.
Customers should take appropriate action to ensure their use of the products does not infringe upon any patents.
Silicon Image, Inc. respects valid patent rights of third parties and does not infringe upon or assist others to
infringe upon such rights.
All information contained herein is subject to change without notice.
Revision History
Revision Date Comment
SiI-DS-0055-A 03/02 Full Release
SiI-DS-0055-B 08/04 Added ePad dimensions and Slave SCDT stabilization guideline.
SiI-DS-0055-C 07/05 ePad dimensions fix. Part ordering number update.
© 2001-2005 Silicon Image. Inc.
SiI 163B PanelLink Receiver
Data Sheet
iii SiI-DS-0055-C
TABLE OF CONTENTS
SiI 163B Pin Diagram ..................................................................................................................................... 1
Functional Description .................................................................................................................................... 2
Electrical Specifications .................................................................................................................................. 3
Absolute Maximum Conditions ................................................................................................................... 3
Normal Operating Conditions ..................................................................................................................... 3
Digital I/O Specifications ............................................................................................................................. 3
DC Specifications........................................................................................................................................ 4
AC Specifications ........................................................................................................................................ 5
Setup and Hold Timings for Data Rates other than 165 MHz ................................................................. 6
Timing Diagrams............................................................................................................................................. 7
Pin Descriptions............................................................................................................................................ 10
Output Pins ............................................................................................................................................... 10
Configuration Pins..................................................................................................................................... 11
Power Management Pins.......................................................................................................................... 11
Differential Signal Data Pins ..................................................................................................................... 12
Reserved Pin............................................................................................................................................. 12
Power and Ground Pins............................................................................................................................ 12
Feature Information ...................................................................................................................................... 13
Dual Link ................................................................................................................................................... 13
Dual Link Configuration Pins................................................................................................................. 13
Dual Link Power Management .............................................................................................................. 16
Dual Link Mode Selection...................................................................................................................... 16
Dual Link Timing Diagrams ................................................................................................................... 17
Clock Detect Function............................................................................................................................... 19
OCK_INV# Function ................................................................................................................................. 19
TFT Panel Data Mapping.......................................................................................................................... 20
Design Recommendations ........................................................................................................................... 27
Differences Between SiI 161A and SiI 163B............................................................................................. 27
Voltage Ripple Regulation......................................................................................................................... 28
Decoupling Capacitors.............................................................................................................................. 29
Series Damping Resistors on Outputs...................................................................................................... 30
Receiver Layout ........................................................................................................................................ 30
Stabilized TMDS Inputs............................................................................................................................. 32
Staggered Outputs and Two Pixels per Clock .......................................................................................... 32
Packaging ..................................................................................................................................................... 33
ePad Enhancement .................................................................................................................................. 33
PCB Thermal Land Area ....................................................................................................................... 34
100-pin TQFP Package Dimensions and Marking Specification .............................................................. 35
Marking Specification ................................................................................................................................ 35
Ordering Information..................................................................................................................................... 35

SII163BCTG100

Mfr. #:
Manufacturer:
Lattice
Description:
25-165MHZ DUAL, PANELLINK RX G-P
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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