LPC2468 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.2 — 11 January 2013 61 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
11.6 Dynamic external memory interface
[1] See Figure 18.
Table 16. Dynamic characteristics: Dynamic external memory interface
C
L
=30pF, T
amb
=
40
C to 85
C, V
DD(DCDC)(3V3)
= V
DD(3V3)
= 3.0 V to 3.6 V, EMC Dynamic Read Config Register = 0x0
(RD = 00)
Symbol Parameter Conditions Min Typ Max Unit
Common
t
d(SV)
chip select valid delay time
[1]
- 1.05 1.76 ns
t
h(S)
chip select hold time
[1]
0.1 1.02 - ns
t
d(RASV)
row address strobe valid delay time
[1]
- 1.51 1.95 ns
t
h(RAS)
row address strobe hold time
[1]
0.5 1.51 - ns
t
d(CASV)
column address strobe valid delay time
[1]
- 0.98 1.27 ns
t
h(CAS)
column address strobe hold time
[1]
0.1 0.97 - ns
t
d(WV)
write valid delay time
[1]
- 0.84 1.95 ns
t
h(W)
write hold time
[1]
0.1 0.84 - ns
t
d(GV)
output enable valid delay time
[1]
- 0.95 1.86 ns
t
h(G)
output enable hold time
[1]
0.1 1 - ns
t
d(AV)
address valid delay time
[1]
- 0.87 1.95 ns
t
h(A)
address hold time
[1]
0.1 0.81 - ns
Read cycle parameters
t
su(D)
data input set-up time
[1]
0.51 2.24 - ns
t
h(D)
data input hold time
[1]
0.57 2.41 - ns
Write cycle parameters
t
d(QV)
data output valid delay time
[1]
- 2.65 4.36 ns
t
h(Q)
data output hold time
[1]
0.49 2.61 - ns
