LPC2468 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 6.2 — 11 January 2013 81 of 85
NXP Semiconductors
LPC2468
Single-chip 16-bit/32-bit micro
17. Revision history
Table 24. Revision history
Document ID Release date Data sheet status Change notice Supersedes
LPC2468 v.6.2 20130111 Product data sheet - LPC2468 v.6.1
Modifications:
• Table 4 “Pin description”, Table note 6: Changed glitch filter spec from 5 ns to 10 ns.
• Table 10 “Dynamic characteristics”: Changed min clock cycle time from 42 to 40.
• Table 17 “Dynamic characteristics: Dynamic external memory interface”: Changed t
d(QV)
typ
and max.
LPC2468 v.6.1 20110906 Product data sheet - LPC2468 v.6
Modifications:
• Table 4 “Pin description”: Updated description for USB_UP_LED1 and USB_UP_LED2.
LPC2468 v.6 20110826 Product data sheet - LPC2468 v.5
Modifications:
• Table 6 “Limiting values”: Added “non-operating” to conditions column of T
stg
.
• Table 6 “Limiting values”: Updated Table note [5].
• Table 8 “Thermal resistance value (C/W): ±15 %”: Added new table.
• Table 9 “Static characteristics”: Changed V
hys
typ value from 0.5V
DD(3V3)
to 0.05V
DD(3V3)
.
• Table 15 “Dynamic characteristics: Static external memory interface”: Removed “AHB clock
= 1 MHz”.
• Table 15 “Dynamic characteristics: Static external memory interface”: Swapped min/max
values for t
am
.
• Table 15 “Dynamic characteristics: Static external memory interface”: Updated t
WEHDNV
spec.
• Table 16 “Dynamic characteristics: Dynamic external memory interface”: Removed “AHB
clock = 1 MHz”.
• Table 17 “Dynamic characteristics: Dynamic external memory interface”: Added new table.
• Section 14.5 “Standard I/O pin configuration” Updated bullets.
LPC2468 v.5 20101015 Product data sheet - LPC2468 v.4
LPC2468 v.4 20081017 Product data sheet - LPC2468 v.3
LPC2468 v.3 20080618 Product data sheet - LPC2468 v.2
LPC2468 v.2 20071017 Preliminary data sheet - LPC2468 v.1
LPC2468 v.1 20070904 Preliminary data sheet - -