MAX9257/MAX9258
16 ______________________________________________________________________________________
Fully Programmable Serializer/Deserializer
with UART/I
2
C Control Channel
V
OLMAX
t
HIGH
t
LOW
t
T
V
OHMIN
PCLK_OUT
Figure 10. MAX9258 Clock Output High and Low Time
PCLK_OUT
t
DVB
t
DVA
V
OHMIN
V
OLMAX
V
OHMIN
V
OLMAX
NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE.
DOUT, VSYNC_OUT,
HSYNC_OUT, LOCK
Figure 11. MAX9258 Output Data Valid Times
PD
POWERED DOWN
t
PUD
POWERED UP
(OUTPUTS ACTIVE)
V
IHMIN
Figure 12. MAX9258 Power-Up Delay
PD
HIGH IMPEDANCE
DOUT,
VSYNC,
HSYNC
POWERED DOWNPOWERED UP
t
PDD
V
ILMAX
Figure 13. MAX9258 Power-Down Delay
MAX9257/MAX9258
______________________________________________________________________________________ 17
Fully Programmable Serializer/Deserializer
with UART/I
2
C Control Channel
FIRST BIT
SDI
PCLK_OUT
DOUT,
HSYNC_OUT,
VSYNC_OUT
LAST BIT
SERIAL WORD N
SERIAL-WORD LENGTH
SERIAL WORD N+1 SERIAL WORD N+2
t
SPD1
PARALLEL WORD N-2
PARALLEL WORD N-1 PARALLEL WORD N
NOTE: PCLK_OUT PROGRAMMED FOR RISING LATCHING EDGE.
Figure 14. MAX9258 Serial-to-Parallel Delay
1.0UI0.75UI0.50UI0.25UI0.0UI
t
JT
t
S
t
S
t
JT
+25mV
-25mV
+100mV
0V
-100mV
INPUT TEMPLATE FOR LVDS SERIAL
V
SDI+
- V
SDI-
NOTE: UI IS ONE SERIAL BIT. TIME INPUT IS MEASURED DIFFERENTIALLY (V
SDI+
- V
SDI-
).
t
R1A
t
F1B
t
R1B
t
F1A
(SDO+) - (SDO-)
0.8V
OD(+)
t
F2
t
R2
0.8 x | V
OD(+)
+ V
OD(-)
| 0.8 x | V
OD(+)
+ V
OD(-)
|
0.2V
OD(-)
0.8V
OD(-)
0.2V
OD(-)
0.8V
OD(-)
0.2 x | V
OD(+)
+ V
OD(-)
| 0.2 x | V
OD(+)
+ V
OD(-)
|
1 0
0.2V
OD(+)
0.8V
OD(+)
0.2V
OD(+)
Figure 15. MAX9258 Jitter Tolerance
Figure 16. Control Channel Transition Time
MAX9257/MAX9258
Detailed Description
The MAX9257 serializer pairs with the MAX9258 deseri-
alizer to form a complete digital video serial link. The
electronic control unit (ECU) programs the registers in
the MAX9257, MAX9258, and peripheral devices, such
as a camera, during the control channel phase that
occurs at startup or during the vertical blanking time.
All control channel communication is half-duplex. The
UART communication between the MAX9258 and the
MAX9257 is encoded to allow transmission through AC-
coupling capacitors. The MAX9257 communicates to
the peripheral device through UART or I
2
C.
The MAX9257/MAX9258 DC-balanced serializer and
deserializer operate from a 5MHz-to-70MHz parallel
clock frequency, and are capable of serializing and
deserializing programmable 10, 12, 14, 16, and 18 bits
parallel data during the video phase. The MAX9257/
MAX9258 have two phases of operation: video and
control channel (Figures 19 and 20). During the video
phase, the MAX9257 accepts parallel video data and
transmits serial encoded data over the LVDS link. The
MAX9258 accepts the encoded serial LVDS data and
converts it back to parallel output data. The MAX9257
has dedicated inputs for HSYNC and VSYNC. The
selected VSYNC edge causes the MAX9257/MAX9258
to enter the control channel phase. Nonactive VSYNC
edge can be asserted after eight pixel clock cycles.
The video data are coded using two overhead bits
(EN0 and EN1) resulting in a serial-word length of N+2
bits. The MAX9257/MAX9258 feature programmable
18 ______________________________________________________________________________________
Fully Programmable Serializer/Deserializer
with UART/I
2
C Control Channel
MAX9258
I
2
C
UART-
TO-I
2
C
UARTUART
CAMERAECU
DESERIALIZER
MAX9257
SERIALIZER
VIDEO DATA
PIXEL CLOCK
LOCK
HSYNC_OUT
VSYNC_OUT
RX
TX
ERROR
PD
CCEN
VIDEO DATA
PIXEL CLOCK
HSYNC_IN
VSYNC_IN
SDA
SCL
GPIO
100Ω100Ω
Figure 17. Serial Link with I
2
C Camera Programming Interface (Base Mode)
MAX9258
UART
UART
UARTUART
CAMERAECU
DESERIALIZER
MAX9257
SERIALIZER
VIDEO DATA
PIXEL CLOCK
HSYNC_OUT
VSYNC_OUT
RX
TX
ERROR
PD
CCEN
LOCK
VIDEO DATA
PIXEL CLOCK
HSYNC_IN
VSYNC_IN
RX
TX
GPIO
100Ω100Ω
Figure 18. Serial Link with UART Camera Programming Interface (Bypass Mode)

MAX9258GCM/V+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Serializers & Deserializers - Serdes Prog Serializer / Deserializer
Lifecycle:
New from this manufacturer.
Delivery:
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