SC16C550B All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 6 — 16 December 2014 16 of 49
NXP Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
6.7 Loopback mode
The internal loopback capability allows on-board diagnostics. In the loopback mode, the
normal modem interface pins are disconnected and reconfigured for loopback internally.
MCR[3:0] register bits are used for controlling loopback diagnostic testing. In the loopback
mode, OUT1
(bit 2) and OUT2 (bit 3) in the MCR register control the modem RI and DCD
inputs, respectively. MCR signals DTR
and RTS (bits 0:1) are used to control the modem
CTS
and DSR inputs, respectively. The transmitter output (TX) and the receiver input (RX)
are disconnected from their associated interface pins, and instead are connected together
internally (see Figure 11
). The inputs CTS, DSR, DCD, and RI are disconnected from their
normal modem control input pins, and instead are connected internally to DTR
, RTS,
OUT1
and OUT2. Loopback test data is entered into the transmit holding register via the
user data bus interface, D0 to D7. The transmit UART serializes the data and passes the
serial data to the receive UART via the internal loopback connection. The receive UART
converts the serial data back into parallel data that is then made available at the user data
interface D0 to D7. The user optionally compares the received data to the initial
transmitted data for verifying error-free operation of the UART TX/RX circuits.
In this mode, the receiver and transmitter interrupts are fully operational. The Modem
Control Interrupts are also operational. However, the interrupts can only be read using the
lower four bits of the Modem Status Register (MSR[3:0]) instead of the four Modem Status
Register bits 7:4. The interrupts are still controlled by the IER.
