8-Channel DAC with PLL and
Single-Ended Outputs, 192 kHz, 24 Bits
Data Sheet
AD1934
Rev. D Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©20072013 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
PLL generated or direct master clock
Low EMI design
108 dB DAC dynamic range and SNR
94 dB THD + N
Single 3.3 V supply
Tolerance for 5 V logic inputs
Supports 24 bits and 8 kHz to 192 kHz sample rates
Single-ended DAC output
Log volume control with autoramp function
SPI® controllable for flexibility
Software-controllable clickless mute
Software power-down
Right-justified, left-justified, I
2
S, and TDM modes
Master and slave modes up to 16-channel in/out
48-lead LQFP
Qualified for automotive applications
APPLICATIONS
Automotive audio systems
Home theater systems
Set-top boxes
Digital audio effects processors
GENERAL DESCRIPTION
The AD1934 is a high performance, single chip that provides
eight digital-to-analog converters (DACs) with single-ended
output using the Analog Devices, Inc., patented multibit sigma-
delta -Δ) architecture. An SPI port is included, allowing a
microcontroller to adjust volume and many other parameters.
The AD1934 operates from 3.3 V digital and analog supplies.
The AD1934 is available in a 48-lead (single-ended output)
L Q F P. Other members of this family include a differential DAC
output version.
The AD1934 is designed for low EMI. This consideration is
apparent in both the system and circuit design architectures.
By using the on-board PLL to derive the master clock from the
LR clock or from an external crystal, the AD1934 eliminates the
need for a separate high frequency master clock and can also be
used with a suppressed bit clock. The DACs are designed using
the latest Analog Devices continuous time architectures to further
minimize EMI. By using 3.3 V supplies, power consumption is
minimized, further reducing emissions.
FUNCTIONAL BLOCK DIAGRAM
06106-001
SERIAL
DATA
PORT
PRECISION
VOLTAGE
REFERENCE
TIMING MANAGEMENT
AND CONTROL
(CLOCK AND PLL)
CONTROL PORT
SPI
CONTROL DATA
INPUT/OUTPUT
AD1934
DIGITAL AUDIO
INPUT/OUTPUT
SDATAIN
CLOCKS
ANALOG
AUDIO
OUTPUTS
6.144MHz
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DIGITAL
FILTER
AND
VOLUME
CONTROL
Figure 1.
AD1934* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
AD1938 Evaluation Board
DOCUMENTATION
Application Notes
AN-1365: AD1933/AD1934/AD1938/AD1939/AD1974
Boot Up Application
Data Sheet
AD1934: 8-Channel DAC with PLL and Single-Ended
Outputs, 192 kHz, 24 Bits Data Sheet
TOOLS AND SIMULATIONS
AD1938 IBIS Model
DESIGN RESOURCES
AD1934 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD1934 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
AD1934 Data Sheet
Rev. D | Page 2 of 29
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 4
Test Conditions ............................................................................. 4
Analog Performance Specifications ........................................... 4
Crystal Oscillator Specifications................................................. 5
Digital Input/Output Specifications........................................... 5
Power Supply Specifications........................................................ 6
Digital Filters ................................................................................. 7
Timing Specifications .................................................................. 7
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Typical Performance Characteristics ........................................... 12
Theory of Operation ...................................................................... 13
Digital-to-Analog Converters (DACs) .................................... 13
Clock Signals ............................................................................... 13
Reset and Power-Down ............................................................. 13
Serial Control Port ..................................................................... 14
Power Supply and Voltage Reference ....................................... 15
Serial Data Ports—Data Format ............................................... 15
Time-Division Multiplexed (TDM) Modes ............................ 15
Daisy-Chain Mode ..................................................................... 17
Control Registers ............................................................................ 21
Definitions ................................................................................... 21
PLL and Clock Control Registers ............................................. 21
DAC Control Registers .............................................................. 22
Auxiliary TDM Port Control Registers ................................... 24
Additional Modes ....................................................................... 24
Application Circuits ....................................................................... 26
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
Automotive Products ................................................................. 27
REVISION HISTORY
2/13—Rev. C to Rev. D
Changes to t
CLH
Comments, Table 7 ............................................... 6
Changes to Serial Control Port Section ....................................... 13
7/11—Rev. B to Rev. C
Deleted References to I
2
C ............................................. Throughout
Changes to Figure 2 and Table 10, DSDATAx/AUXDATA1 Pin
Descriptions ...................................................................................... 9
1/11—Rev. A to Rev. B
Added Automotive Information .................................. Throughout
Change to Table 2, Introductory Text ............................................ 4
Change to Table 4, Introductory Text ............................................ 4
Change to Table 7, Introductory Text ............................................ 6
Changes to Ordering Guide .......................................................... 26
9/09—Rev. 0 to Rev. A
Change to Title ................................................................................... 1
Change to Table 11 ......................................................................... 13
Change to Power Supply and Voltage Reference Section .......... 14
Updated Outline Dimensions ....................................................... 26
Changes to Ordering Guide .......................................................... 26
8/07—Revision 0: Initial Version

AD1934YSTZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio D/A Converter ICs IC 8 CHAudio w/on chip PLL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet