Data Sheet AD1934
Rev. D | Page 9 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
06106-020
AVDD
48
LF
47
NC
46
NC
45
NC
44
NC
43
NC
42
NC
41
NC
40
NC
39
CM
38
AVDD
37
DVDD
13
DSDATA3
14
DSDATA2
15
DSDATA1
16
DBCLK
17
DLRCLK
18
AUXDATA1
19
NC
20
AUXTDMBCLK
21
AUXTDMLRCLK
22
CIN
23
COUT
24
AGND
1
MCLKI/XI
2
MCLKO/XO
3
AGND
4
AVDD
5
OL3
6
OR3
7
OL4
8
OR4
9
PD/RST
10
DSDATA4
11
DGND
12
AGND
36
FILTR
35
AGND
34
AVDD
33
AGND
32
OR2
31
OL2
30
OR1
29
OL1
28
CLATCH
27
CCLK
26
DGND
25
AD1934
TOP VIEW
(Not to Scale)
SINGLE-ENDED
OUTPUT
NC = NO CONNECT
Figure 2. Pin Configuration
Table 10. Pin Function Description
Pin No. Input/Output Mnemonic Description
1 I AGND Analog Ground.
2 I MCLKI/XI Master Clock Input/Crystal Oscillator Input.
3 O MCLKO/XO Master Clock Output/Crystal Oscillator Output.
4
I
AGND
Analog Ground.
5 I AVDD Analog Power Supply. Connect to analog 3.3 V supply.
6 O OL3 DAC 3 Left Output.
7 O OR3 DAC 3 Right Output.
8 O OL4 DAC 4 Left Output.
9 O OR4 DAC 4 Right Output.
10 I
PD
/
RST
Power-Down Reset (Active Low).
11 I/O DSDATA4 DAC Serial Data Input 4. Data input to DAC4 data in/TDM DAC2 data out (dual-line
mode)/AUX DAC2 data out (to external DAC2).
12 I DGND Digital Ground.
13 I DVDD Digital Power Supply. Connect to digital 3.3 V supply.
14 I/O DSDATA3 DAC Serial Data Input 3. Data input to DAC3 data in/TDM DAC2 data in (dual-line
mode)/AUX not used.
15 I/O DSDATA2 DAC Serial Data Input 2. Data input to DAC2 data in/TDM DAC2 data out/AUX not used.
16 I DSDATA1 DAC Serial Data Input 1. Data input to DAC1 data in/TDM DAC data in/AUX TDM data in.
17 I/O DBCLK Bit Clock for DACs (Regular Stereo, TDM, or Daisy-Chain TDM Mode).
18 I/O DLRCLK LR Clock for DACs (Regular Stereo, TDM, or Daisy-Chain TDM Mode).
19 O AUXDATA1 AUX DAC1 data out (to external DAC1).
20 NC No Connect.
21 I/O AUXTDMBCLK Auxiliary Mode Only DAC TDM Bit Clock.
22 I/O AUXTDMLRCLK Auxiliary Mode Only DAC LR TDM Clock.
23 I CIN/ADR0 Control Data Input (SPI).
24 I/O COUT/SDA Control Data Output (SPI).
25 I DGND Digital Ground.
AD1934 Data Sheet
Rev. D | Page 10 of 28
Pin No. Input/Output Mnemonic Description
26 I CCLK/SCL Control Clock Input (SPI).
27 I
CLATCH
/ADR1 Latch Input for Control Data (SPI).
28 O OL1 DAC 1 Left Output.
29 O OR1 DAC 1 Right Output.
30 O OL2 DAC 2 Left Output.
31 O OR2 DAC 2 Right Output.
32 I AGND Analog Ground.
33 I AVDD Analog Power Supply. Connect to analog 3.3 V supply.
34 I AGND Analog Ground.
35 O F ILTR Voltage Reference Filter Capacitor Connection. Bypass with 10 µF||100 nF to AGND.
36
I
AGND
Analog Ground.
37 I AVDD Analog Power Supply. Connect to analog 3.3 V supply.
38 O CM Common-Mode Reference Filter Capacitor Connection. Bypass with 47 µF||100 nF to AGND.
39 to 46 NC Must Be Tied to Common Mode, Pin 38. Alternately, ac-coupled to ground.
47 O LF PLL Loop Filter. Return to AVDD.
48
I
AVDD
Analog Power Supply. Connect to analog 3.3 V supply.
Data Sheet AD1934
Rev. D | Page 11 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
0.06
0.04
0.02
–0.06
–0.04
–0.02
0
0 24168
MAGNITUDE (dB)
FREQUENCY (kHz)
06106-004
Figure 3. DAC Pass-Band Filter Response, 48 kHz
0
–150
–100
–50
0 4812 24 36
MAGNITUDE (dB)
FREQUENCY (kHz)
06106-005
Figure 4. DAC Stop-Band Filter Response, 48 kHz
0.10
–0.10
–0.05
0
0.05
0 96724824
MAGNITUDE (dB)
FREQUENCY (kHz)
06106-006
Figure 5. DAC Pass-Band Filter Response, 96 kHz
0
–150
–100
–50
0 9624 48 72
MAGNITUDE (dB)
FREQUENCY (kHz)
06106-007
Figure 6. DAC Stop-Band Filter Response, 96 kHz
0.5
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0 648 16 32
MAGNITUDE (dB)
FREQUENCY (kHz)
06106-008
Figure 7. DAC Pass-Band Filter Response, 192 kHz
–10
–8
–6
–4
–2
0
48 9664 80
MAGNITUDE (dB)
FREQUENCY (kHz)
06106-009
Figure 8. DAC Stop-Band Filter Response, 192 kHz

AD1934YSTZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Audio D/A Converter ICs IC 8 CHAudio w/on chip PLL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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