ICS1894-33
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 19
ICS1894-33 REV A 021612
7.7 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0 0
7.6 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0
7.5 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0
7.4 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0
7.3 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0 1
7.2 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0
7.1 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 0
7.0 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RW 1
Register 8 - Auto-Negotiation Next Page Link Partner Ability
8.15 Next Page Last Page Additional Pages follow RO 0 0
8.14 IEEE reserved Always 0 N/A RO 0†
8.13 Message Page Unformatted Page Message Page RO 0
8.12 Acknowledge 2 Cannot comply with
Message
Can comply with Message RO 0
8.11 Toggle Previous Link Code
Word was zero
Previous Link Code Word
was one
RO 0 0
8.10 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.9 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.8 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.7 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0 0
8.6 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.5 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.4 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex
ICS1894-33
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 20
ICS1894-33 REV A 021612
8.3 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0 0
8.2 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.1 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
8.0 Message code field
/Unformatted code field
Bit value depends on the
particular message
Bit value depends on the
particular message
RO 0
Register 9 through 15 - Reserved by IEEE
Register 16 - Extended Control Register
16.15 Command Override
Write enable
Disabled Enabled RW SC 0
16.14 ICS reserved Reserved Reserved RW/0 0
16.13 ICS reserved Reserved Reserved RW/0 0
16.12 ICS reserved Reserved Reserved RW/0 0
16.11 ICS reserved Reserved Reserved RW/0 0
16.10 PHY Address Bit 4 RO 0
16.9 PHY Address Bit 3 RO 0
16.8 PHY Address Bit 2 RO L
16.7 PHY Address Bit 1 RO L
16.6 PHY Address Bit 0 RO L
16.5 Stream Cipher Test
Mode
Normal operation Test mode RW 0
16.4 ICS reserved Reserved Reserved RW/0
16.3 NRZ/NRZI encoding NRZ encoding NRZI encoding RW 1 8
16.2 Transmit invalid codes Disabled Enabled RW 0
16.1 ICS reserved Reserved Reserved RW/0 0
16.0 Stream Cipher disable Stream Cipher enabled Stream Cipher disabled RW 0
Register
17 - Quick Poll Detailed Status Register
17.15 Data rate 10 Mbps 100 Mbps RO
17.14 Duplex Half duplex (mode not
supported)
Full duplex RO
17.13 Auto-Negotiation
Progress Monitor Bit 2
Reference Decode Table Reference Decode Table RO LM
X
0
17.12 Auto-Negotiation
Progress Monitor Bit 1
Reference Decode Table Reference Decode Table RO LM
X
0
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex
ICS1894-33
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 21
ICS1894-33 REV A 021612
17.11 Auto-Negotiation
Progress Monitor Bit 0
Reference Decode Table Reference Decode Table RO LM
X
00
17.10 100Base-TX signal lost Valid signal Signal lost RO LH 0
17.9 100BasePLL Lock Error PLL locked PLL failed to lock RO LH 0
17.8 False Carrier detect Normal Carrier or Idle False Carrier RO LH 0
17.7 Invalid symbol detected Valid symbols observed Invalid symbol received RO LH 0 0
17.6 Halt Symbol detected No Halt Symbol received Halt Symbol received RO LH 0
17.5 Premature End detected Normal data stream Stream contained two
IDLE symbols
RO LH 0
17.4 Auto-Negotiation
complete
Auto-Negotiation in
process
Auto-Negotiation
complete
RO 0
17.3 100Base-TX signal
detect
Signal present No signal present RO 1 8
17.2 Jabber detect No jabber detected Jabber detected RO LH 0
17.1 Remote fault No remote fault detected Remote fault detected RO LH 0
17.0 Link Status Link is not valid Link is valid RO LL 0
Register
18 - 10Base-T Operations Register
18.15 Remote Jabber Detect No Remote Jabber
Condition detected
Remote Jabber Condition
Detected
RO LH 0
18.14 Polarity reversed Normal polarity Polarity reversed RO LH 0
18.13 Data Bus Mode [1x]=RMII mode
[01]=Not supported
[00]=Not supported
R0
18.12 R0 L
18.11 AMDIXEN AMDIX disable AMDIX enable RW L
18.10 RXTRI RX output enable RX tri-state for RMII
interface
RW L
18.9 REGEN Vender reserved register
access enable
Vender reserved register
(byte25~byte31) access
disable
RW L
18.8 TM_SWITCH Switch TMUX2 to TMUX1, test control RW 0
18.7 ICS reserved Reserved Reserved RW/0
18.6 ICS reserved Reserved Reserved RW/0
18.5 Jabber inhibit Normal Jabber behavior Jabber Check disabled RW 0
18.4 ICS reserved Reserved Reserved RW/1 1
18.3 Auto polarity inhibit Polarity automatically
corrected
Polarity not automatically
corrected
RW 0 0
18.2 SQE test inhibit Normal SQE test
behavior
SQE test disabled RW 0
18.1 Link Loss inhibit Normal Link Loss
behavior
Link Always = Link Pass RW 0
18.0 Squelch inhibit Normal squelch behavior No squelch RW 0
Bit Definition When Bit = 0 When Bit = 1 Access
2
SF
2
Default
3
Hex

1894K-33LFT

Mfr. #:
Manufacturer:
IDT
Description:
Ethernet ICs 3.3V 10/100 PHY RMII
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet