ICS1894-33
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 4
ICS1894-33 REV A 021612
Notes:
1. AIO: Analog input/output PAD.
IO: Digital input/output.
IN/Ipu: Digital input with internal 20k pull-up.
IN/Ipd: Digital input with internal 20k pull-down.
IO/Ipu: Digital input/output with internal 20k pull-up.
IO/Ipd: Digital input/output with internal 20k pull-down.
2. RMII Rx Mode: The RXD[1:0] bits are synchronous with REFIN. For each clock period in which CRS_DV is
asserted, two bits of recovered data are sent from the PHY to the MAC.
3. RMII Tx Mode: The TXD[1:0] bits are synchronous with REFIN. For each clock period in which TX_EN is
asserted, two bits of data are received by the PHY from the MAC.
31 P0/LED0 IO PHY address Bit 0 as input (during power on reset/hardware reset) and LED # 0
(function configurable, default is "activity/no activity") as output
32 P1/ISO/LED1 IO PHY address Bit 1 as input (during power on reset/hardware reset) and LED # 1
(function configurable, default is "10/100 mode") as output; After latch, alternates as
a real time receiver isolation input.
PADDLE VSS Ground Connect to ground.
Pin
Number
Pin
Name
Pin
Type
1
Pin Description
ICS1894-33
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 5
ICS1894-33 REV A 021612
Strapping Options
1. IO/Ipu = Digital Input with internal 20k pull-up during power on reset/hardware reset; output pin otherwise.
2. IO/Ipd = Digital Input with internal 20k pull-down during power on reset/hardware reset; output pin otherwise.
3. If RXTRI/RXD1 pin is latched high during power on reset/hardware reset, P1/ISO/LED1 functions as RX real time
isolation control input after latch and LED1 function will be disabled.
Pin
Number
Pin
Name
Pin
Type
1
Pin Function
14 AMDIX IO/Ipu
1 = AMDIX enable
0 = AMDIX disable
15 P3 IO/Ipd The PHY address is set by P[3:0] at power-on reset. P0 and P1 must have external
pull-up or pull-down to set address at start up.
11 P2/INT IO/Ipd
31 P0/LED0 IO
32 P1/ISO/LED1 IO
16 RXTRI/RXD1 IO/Ipd 1 = Real time receiver isolation function enable
3
; 0 = Receiver Tristate Disable
17 FDPX/RXD0 IO/Ipu
1=Full duplex
0=Half duplex
Ignored if Auto negotiation is enabled
18 RMII/RXDV IO/Ipd
1 = RMII mode
0 = Not supported
20 ANSEL IO/Ipu
1=Enable auto negotiation
0=Disable auto negotiation
21 NOD/RXER IO/Ipd
0=Node mode
1=repeater mode (mode not supported)
22 SPEED IO/Ipu
1=100M mode
0=10M mode
Ignored if Auto negotiation is enabled
ICS1894-33
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 6
ICS1894-33 REV A 021612
Application Schematic

1894K-33LFT

Mfr. #:
Manufacturer:
IDT
Description:
Ethernet ICs 3.3V 10/100 PHY RMII
Lifecycle:
New from this manufacturer.
Delivery:
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