LTC1966
28
1966fb
applicaTions inForMaTion
Interfacing with an ADC
The LTC1966 output impedance and the RMS averaging
ripple need to be considered when using an analog-to-
digital converter (ADC) to digitize the LTC1966 RMS result.
The simplest configuration is to connect the LTC1966
directly to the input of a type 7106/7136 ADC as shown
in Figure 25a. These devices are designed specifically for
DVM/DPM use and include display drivers for a 3 1/2 digit
LCD segmented display. Using a dual slope conversion,
the input is sampled over a long integration window, which
results in rejection of line frequency ripple when integration
time is an integer number of line cycles. Finally, these parts
have an input impedance in the GΩ range, with specified
input leakage of 10pA to 20pA. Such a leakage, combined
with the LTC1966 output impedance, results in just 1µV
to 2µV of additional output offset voltage.
for are the input impedance, and any input sampling cur-
rents. The input sampling currents drawn by ∆∑ ADCs
often have large spikes of current with short durations
that can confuse some op amps, but with the large C
AVE
needed by the LTC1966 these are not an issue.
The average current is important, as it can create LTC1966
errors; if it is constant it will create an offset, while aver-
age currents that change with the voltage level create gain
errors. Some converters run continuously, others only
sample upon demand, and this will change the results in
ways that need to be understood. The LTC1966 output
impedance has a loose tolerance relative to the usual re-
sistors and the same can be true for the input impedance
of ∆∑ ADC, resulting in gain errors from part-to-part. The
system calibration techniques described in the following
section should be used in applications that demand tight
tolerances.
One example of driving an oversampling ∆∑ ADC is shown
in Figure 25b. In this circuit, the LTC2420 is used with a
1V V
REF
. Since the LTC1966 output voltage range is about
1V, and the LTC2420 has a ±12.5% extended input range,
this configuration matches the two ranges with room to
spare. The LTC2420 has an input impedance of 16.6MΩ,
resulting in a gain error of –0.4% to –0.6%. In fact, the
LTC2420 DC input current is not zero at 0V, but rather at
one half its reference, so both an output offset and a gain
error will result. These errors will vary from part to part,
but with a specific LTC1966 and LTC2420 combination,
the errors will be fixed, varying less than ±0.05% over
temperature. So a system that has digital calibration can
be quite accurate despite the nominal gain and offset error.
With 20 bits of resolution, this part is more accurate than
the LTC1966, but the extra resolution is helpful because
it reduces nonlinearity at the LSB transitions as a digital
gain correction is made. Furthermore, its small size and
ease of use make it attractive.
Figure 25a. Interfacing to DVM/DPM ADC
Figure 25b. Interfacing to LTC2420
Another type of ADC that has inherent rejection of RMS
averaging ripple is an oversampling ∆∑. With most, but not
all, of these devices, it is possible to connect the LTC1966
output directly to the converter input. Issues to look out
C
AVE
LTC1966
OUTPUT
OUT RTN
7106 TYPE
IN HI
IN LO
5
6
31
1966 F25a
30
C
AVE
LTC1966
OUTPUT
OUT RTN
LTC2420
V
IN
SERIAL
DATA
DIGITALLY CORRECT
LOADING ERRORS
GND
SDO
SCK
CS
5
6
3
1966 F25b
4
V
REF
2
1V
LTC1966
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As is shown in Figure 25b, where the LTC2420 is set to
continuously convert by grounding the CS pin. The gain
error will be less if CS is driven at a slower rate, however,
the rate should either be consistent or at a rate low enough
that the LTC1966 and its output capacitor have fully settled
by the beginning of each conversion, so that the loading
errors are consistent.
Note that in this circuit, the input current of the LTC2420
is being used to assure monotonicity. The LTC2420 Z
IN
of
16.6MΩ is effectively connected to half the reference volt-
age, so when the LTC1966 has zero signal, 500mV/16.6MΩ
= 30nA is provided.
Alternatively, a 5V V
REF
can be used, but in this case the
LTC1966 output span will only use 20% of the LTC2420’s
input voltage range. Furthermore, if the OUTRTN remains
grounded, the injected current with zero signal will be
150nA, resulting in 5× the offset error and nonlinearity
shown in Figure 22.
In both of the circuits of Figure 25, a guard ring only has to
encircle three terminals, the LTC1966 output, the top of the
averaging capacitor, and the ADC input. Figure 26 shows
the top copper patterns for example PCB layouts of each.
The low power consumption of the LTC1966 makes it well
suited for battery powered applications, and its slow output
(DC) makes it an ideal candidate for a micropower ADC.
applicaTions inForMaTion
Figure 26b. PCB Layout of Figure 25b with Guard Ring
Figure 26a. PCB Layout of Figure 25a with Guard Ring
Figure 10 in Application Note 75, for instance, details a
10-bit ADC with a 35ms conversion time that uses just
29µA of supply current. Such an ADC may also be of use
within a 4mA to 20mA loop.
Other types of ADCs sample the input signal once and
perform a conversion on that one sample. With these ADCs
(Nyquist ADCs), a post filter will be needed in most cases
to reduce the peak error with low input frequencies. The
DC accurate filter of Figure 14 is attractive from an error
standpoint, but it increases the impedance at the ADC
input. In most cases, the buffered post filter of Figure13
will be more appropriate for use with Nyquist analog-to-
digital converters.
SYSTEM CALIBRATION
The LTC1966 static accuracy can be improved with end
system calibration. Traditionally, calibration has been
done at the factory, or at a service depot only, typically
using manually adjusted potentiometers. Increasingly,
systems are being designed for electronic calibration
where the accuracy corrections are implemented in digital
code wherever possible, and with calibration DACs where
necessary. Additionally, many systems are now designed
for self calibration, in which the calibration occurs inside
the machine, automatically without user intervention.
LTC1966
MS8
1966 F26b
LTC2420
SO8
1µfC
AVE
1966 F26a
1µfC
AVE
LTC1966
MS8
ICL7106
MQFP
LTC1966
30
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Whatever calibration scheme is used, the linearity of the
LTC1966 will improve the calibrated accuracy over that
achievable with older log/antilog RMS-to-DC converters.
Additionally, calibration using DC reference voltages are
essentially as accurate with the LTC1966 as those using
AC reference voltages. Older log/antilog RMS-to-DC
converters required nonlinear input stages (rectifiers)
whose linearity would typically render DC based calibra-
tion unworkable.
The following are four suggested calibration methods.
Implementations of the suggested adjustments are de-
pendent on the system design, but in many cases, gain
and output offset can be corrected in the digital domain,
and will include the effect of all gains and offsets from the
LTC1966 output through the ADC. Input offset voltage, on
the other hand, will have to be corrected with adjustment
to the actual analog input to the LTC1966.
The methods below assume the unaltered linearity of the
LTC1966, i.e. without the monotonicity fix of Figure 21.
If this is present, the V
OOS
shift it introduces should be
taken out before using either method for which V
OOS
is
not calibrated. Also, the nonlinearity it introduces will
increase the 20mV readings discussed below by 0.78%
but increase the 200mV readings only 78ppm. There
are a variety of ways to deal with these errors, including
possibly ignoring them, but the specifics will depend on
system requirements. Designers are cautioned to avoid
the temptation to digitally take out the hyperbolic transfer
function introduced because if the offsets are not exactly
the nominals assumed, the system will end up right back
where it began with a potential discontinuity with zero
input, either from a divide by zero or from a square root
of a negative number in the calculations to undo the hy-
perobic transfer function. An adaptive algorithm would
most likely be necessary to safely take out more than half
of the introduced nonlinearity.
If a 5V reference is used in the connection of Figure 25b,
the V
OOS
and nonlinearity created would be even larger,
and will no doubt be more tempting to correct for. Design-
ers are likewise cautioned against correcting for all of the
nonlinearity.
AC-Only, 1 Point
The dominant error at full-scale will be caused by the
gain error, and by applying a full-scale sine wave input,
this error can be measured and corrected for. Unlike older
log/antilog RMS-to-DC converters, the correction should
be made for zero error at full scale to minimize errors
through
out the dynamic range.
The best frequency for the calibration signal is roughly ten
times the –0.1% DC error frequency. For 1µF, –0.1% DC
error occurs at 8Hz, so 80Hz is a good calibration frequency,
although anywhere from 60Hz to 100Hz should suffice.
The trade-off here is that on the one hand, the DC error
is input frequency dependent, so a calibration signal
frequency high enough to make the DC error negligible
should be used. On the other hand, as low a frequency as
can be used is best to avoid attenuation of the calibrated
AC signal, either from parasitic RC loading or insufficient
op amp gain. For instance, with a 1kHz calibration signal,
a 1MHz op amp will typically only have 60dB of open loop
gain, so it could attenuate the calibration signal a full 0.1%.
AC-Only, 2 Point
The next most significant error for AC-coupled applications
will be the effect of output offset voltage, noticeable at the
bottom end of the input scale. This too can be calibrated
out if two measurements are made, one with a full-scale
sine wave input and a second with a sine wave input (of
the same frequency) at 10% of full-scale. The trade-off in
selecting this second level is that it should be small enough
that the gain error effect becomes small compared to the
gain error effect at full-scale, while on the other hand,
not using so small an input that the input offset voltage
becomes an issue.
applicaTions inForMaTion

LTC1966MPMS8#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Prec uP, DS RMS-to-DC Conv
Lifecycle:
New from this manufacturer.
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