MAX1316–MAX1318/MAX1320–MAX1322/MAX1324–MAX1326
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
22 ______________________________________________________________________________________
The input range is centered about V
MSV
, which is inter-
nally set to +2.500V. For a custom midscale voltage,
drive REF
MS
with an external voltage source and MSV
will follow REF
MS
. Noise present on MSV or REF
MS
directly couples into the ADC result. Use a precision,
low-drift voltage reference with adequate bypassing to
prevent MSV from degrading ADC performance. For
maximum FSR, be careful not to violate the absolute
maximum voltage ratings of the analog inputs when
choosing V
MSV
. Determine the input voltage as a func-
tion of V
REF
, V
MSV
, and the output code in decimal
using the following equation:
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. For
these devices, this straight line is a line drawn between
the end points of the transfer function, once offset and
gain errors have been nullified.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. For
these devices, the DNL of each digital output code is
measured and the worst-case value is reported in the
Electrical Characteristics
table. A DNL error specifica-
tion of less than ±1 LSB guarantees no missing codes
and a monotonic transfer function.
Unipolar Offset Error
For the unipolar MAX1316/MAX1317/MAX1318, the ideal
zero-scale transition from 0x0000 to 0x0001 occurs at
1 LSB (see Figure 11). The unipolar offset error is the
amount of deviation between the measured zero-scale
transition point and the ideal zero-scale transition point.
Bipolar Offset Error
For the bipolar MAX1320/MAX1321/MAX1322/
MAX1324/MAX1325/MAX1326, the ideal zero-point tran-
sition from 0x3FFF to 0x0000 occurs at MSV, which is
usually connected to ground (see Figures 9 and 10).
The bipolar offset error is the amount of deviation
between the measured zero-point transition and the
ideal zero-point transition.
Gain Error
The ideal full-scale transition from 0x1FFE to 0x1FFF
occurs at 1 LSB below full scale (see the
Transfer
Functions
section). The gain error is the amount of devi-
ation between the measured full-scale transition point
and the ideal full-scale transition point, once offset error
has been nullified.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of the
full-scale analog input (RMS value) to the RMS quanti-
zation error (residual error). The ideal, theoretical mini-
mum analog-to-digital noise is caused by quantization
noise error only and results directly from the ADC’s res-
olution (N bits):
where N = 14 bits.
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
SNR N dB+(. . )602 176
V LSB CODE V
CH MSV_
+
()
10
- 2.500V
Figure 11. 0 to +5V Unipolar Transfer Function
2 x V
REF
2 x V
REF
2 x V
REF
2
14
1 LSB =
BINARY OUTPUT CODE
0 2 16,38316,381
0x0000
0x0001
0x0002
0x0003
0x3FFF
0x3FFE
0x3FFD
0x3FFC
0x1FFF
0x2000
0x2001
8190
8192
8194
(MSV)
INPUT VOLTAGE (LSBs)
MAX1316–MAX1318/MAX1320–MAX1322/MAX1324–MAX1326
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
______________________________________________________________________________________ 23
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all the other ADC output signals:
Effective Number of Bits
The effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the ENOB as follows:
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V
1
is the fundamental amplitude and V
2
through
V
5
are the 2nd- through 5th-order harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next-largest fre-
quency component.
Aperture Delay
Aperture delay (t
AD
) is the time delay from the sampling
clock edge to the instant when an actual sample is taken.
Aperture Jitter
Aperture Jitter (t
AJ
) is the sample-to-sample variation in
aperture delay.
Channel-to-Channel Isolation
Channel-to-channel isolation indicates how well each
analog input is isolated from the other channels. Channel-
to-channel isolation is measured by applying DC to chan-
nels 1 to 7, while a -0.5dBFS sine wave is applied to
channel 0. A 100kHz FFT is taken for channel 0 and
channel 1. Channel-to-channel isolation is expressed in
dB as the power ratio of the two 100kHz magnitudes.
Small-Signal Bandwidth
A small -20dBFS analog input signal is applied to an
ADC in a manner that ensures that the signal’s slew
rate does not limit the ADC’s performance. The input
frequency is then swept up to the point where the
amplitude of the digitized conversion result has
decreased 3dB.
Full-Power Bandwidth
A large -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by 3dB. This point is defined as full-
power input bandwidth frequency.
Chip Information
TRANSISTOR COUNT: 80,000
PROCESS: BiCMOS 0.6µm
THD
VVVV
V
+++
20
2
2
3
2
4
2
5
2
1
log
ENOB
SINAD
=
-176
602
.
.
SINAD dB
Signal
Noise Distortion
RMS
RMS
( ) log
()
+
20
MAX1316–MAX1318/MAX1320–MAX1322/MAX1324–MAX1326
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
24 ______________________________________________________________________________________
Typical Operating Circuits
MAX1316
MAX1317
MAX1318
CH0
CH7
CH6
CH5
CH4
CH3
CH2
CH1
D12
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
AV
DD
AGND
DV
DD
DGND
MSV
REF
MS
REF
REF+
COM
REF-
+5V
GND
+3V
GND
D13
SHDN
ALLON
ANALOG
INPUTS
0 TO +5V
PARALLEL
DIGITAL
OUTPUT
CONVST
CLK
DIGITAL
INTERFACE
AND
CONTROL
4
5
7
8
9
10
11
12
2, 3, 14, 16, 23
21
22
20
19
18
6
17
44
42
43
38
45
47
48
46
40
41
37
36
35
34
33
32
31
30
29
28
27
26
25
24
39
13
AV
DD
AV
DD
15
1
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.01µF
0.1µF
0.01µF
2.2µF
2.2µF
2.2µF
MAX1316
MAX1317
MAX1318
UNIPOLAR
CONFIGURATION
INTCLK/EXTCLK
CS
RD
WR
EOC
EOLC
PARALLEL
DIGITAL
I/O

MAX1322ECM+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog to Digital Converters - ADC 14-Bit 2Ch 526ksps 3V Precision ADC
Lifecycle:
New from this manufacturer.
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