P89LPC915HDH,129 Datasheet P89LPC916FDH,129, P89LPC915FDH,129, P89LPC916FDH,118 | P22-P24

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Product data sheet Rev. 05 — 15 December 2009 22 of 75

NXP Semiconductors

P89LPC915/916/917

8-bit microcontrollers with accelerated two-clock 80C51 core

[1] All ports are in input only (high-impedance) state after power-up.

[2] BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.

[3] The RSTSRC register reﬂects the cause of the P89LPC915/916/917 reset. Upon a power-up reset, all reset source ﬂags are cleared except POF and BOF; the power-on reset

value is xx11 0000.

[4] After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.

Other resets will not affect WDTOF.

[5] On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.

[6] The only reset source that affects these SFRs is power-on reset.

Bit address 8F 8E 8D 8C 8B 8A 89 88

TCON* Timer 0 and 1 control 88H TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 00 0000 0000

TH0 Timer 0 high 8CH 00 0000 0000

TH1 Timer 1 high 8DH 00 0000 0000

TL0 Timer 0 low 8AH 00 0000 0000

TL1 Timer 1 low 8BH 00 0000 0000

TMOD Timer 0 and 1 mode 89H T1GATE T1C/T T1M1 T1M0 T0GATE T0C/T T0M1 T0M0 00 0000 0000

TRIM Internal oscillator trim register 96H RCCLK - TRIM.5 TRIM.4 TRIM.3 TRIM.2 TRIM.1 TRIM.0

[5] [6]

WDCON Watchdog control register A7H PRE2 PRE1 PRE0 - - WDRUN WDTOF WDCLK

[4] [6]

WDL Watchdog load C1H FF 1111 1111

WFEED1 Watchdog feed 1 C2H

WFEED2 Watchdog feed 2 C3H

Table 7. P89LPC915 special function registers

…continued

* indicates SFRs that are bit addressable.

Name Description SFR

addr.

Bit functions and addresses Reset value

MSB LSB Hex Binary

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Product data sheet Rev. 05 — 15 December 2009 23 of 75

NXP Semiconductors

P89LPC915/916/917

8-bit microcontrollers with accelerated two-clock 80C51 core

Table 8. P89LPC916 special function registers

* indicates SFRs that are bit addressable.

Name Description SFR

addr.

Bit functions and addresses Reset value

MSB LSB Hex Binary

Bit address E7 E6 E5 E4 E3 E2 E1 E0

ACC* Accumulator E0H 00 0000 0000

ADCON1 ADC control register 1 97H ENBI1 ENADCI

TMM1 EDGE1 ADCI1 ENADC1 ADCS11 ADCS10 00 0000 0000

ADINS ADC input select A3H ADI13 ADI12 ADI11 ADI10 - - - - 00 0000 0000

ADMODA ADC mode register A C0H BNDI1 BURST1 SCC1 SCAN1 - - - - 00 0000 0000

ADMODB ADC mode register B A1H CLK2 CLK1 CLK0 - ENDAC1 - BSA1 - 00 000x 0000

AD1BH A/D_1 boundary high register C4H FF 1111 1111

AD1BL A/D_1 boundary low register BCH 00 0000 0000

AD1DAT0 A/D_1 data register 0 D5H 00 0000 0000

AD1DAT1 A/D_1 data register 1 D6H 00 0000 0000

AD1DAT2 A/D_1 data register 2 D7H 00 0000 0000

AD1DAT3 A/D_1 data register 3 F5H 00 0000 0000

AUXR1 Auxiliary function register A2H CLKLP EBRR - ENT0 SRST 0 - DPS 00 0000 00x0

Bit address F7 F6 F5 F4 F3 F2 F1 F0

B* B register F0H 00 0000 0000

BRGR0 Baud rate generator rate low BEH 00 0000 0000

BRGR1 Baud rate generator rate high BFH 00 0000 0000

BRGCON Baud rate generator control BDH - -----SBRGS BRGEN 00

[2]

xxxx xx00

CMP1 Comparator 1 control register ACH - - CE1 CP1 CN1 - CO1 CMF1 00

[1]

xx00 0000

CMP2 Comparator 2 control register ADH - - CE2 CP2 CN2 OE2 CO2 CMF2 00

[1]

xx00 0000

DIVM CPU clock divide-by-M control 95H 00 0000 0000

DPTR Data pointer (2 bytes)

DPH Data pointer high 83H 00 0000 0000

DPL Data pointer low 82H 00 0000 0000

FMADRH Program ﬂash address high E7H 00 0000 0000

FMADRL Program ﬂash address low E6H 00 0000 0000

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Product data sheet Rev. 05 — 15 December 2009 24 of 75

NXP Semiconductors

P89LPC915/916/917

8-bit microcontrollers with accelerated two-clock 80C51 core

FMCON Program ﬂash control (Read) E4H BUSY - - - HVA HVE SV OI 70 0111 0000

Program ﬂash control (Write) E4H FMCMD.

FMCMD.

FMDATA Program ﬂash data E5H 00 0000 0000

I2ADR I

C slave address register DBH I2ADR.6 I2ADR.5 I2ADR.4 I2ADR.3 I2ADR.2 I2ADR.1 I2ADR.0 GC 00 0000 0000

Bit address DF DE DD DC DB DA D9 D8

I2CON* I

C control register D8H - I2EN STA STO SI AA - CRSEL 00 x000 00x0

I2DAT I

C data register DAH

I2SCLH Serial clock generator/SCL

duty cycle register high

DDH 00 0000 0000

I2SCLL Serial clock generator/SCL

duty cycle register low

DCH 00 0000 0000

I2STAT I

C status register D9H STA.4 STA.3 STA.2 STA.1 STA.0 0 0 0 F8 1111 1000

Bit address AF AE AD AC AB AA A9 A8

IEN0* Interrupt enable 0 A8H EA EWDRT EBO ES/ESR ET1 - ET0 EX0 00 0000 0000

Bit address EF EE ED EC EB EA E9 E8

IEN1* Interrupt enable 1 E8H EAD EST - - ESPI EC EKBI EI2C 00

[1]

00x0 0000

Bit address BF BE BD BC BB BA B9 B8

IP0* Interrupt priority 0 B8H - PWDRT PBO PS/PSR PT1 - PT0 PX0 00

[1]

x000 0000

IP0H Interrupt priority 0 high B7H - PWDRT

PBOH PSH/

PSRH

PT1H - PT0H PX0H 00

[1]

x000 0000

Bit address FF FE FD FC FB FA F9 F8

IP1* Interrupt priority 1 F8H PAD PST - - PSPI PC PKBI PI2C 00

[1]

00x0 0000

IP1H Interrupt priority 1 high F7H PADH PSTH - - PSPIH PCH PKBIH PI2CH 00

[1]

00x0 0000

KBCON Keypad control register 94H - -----PATN

_SEL

KBIF 00

[1]

xxxx xx00

KBMASK Keypad interrupt mask

86H 00 0000 0000

KBPATN Keypad pattern register FF 1111 1111

Table 8. P89LPC916 special function registers

…continued

* indicates SFRs that are bit addressable.

Name Description SFR

addr.

Bit functions and addresses Reset value

MSB LSB Hex Binary

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P30 P31-P33 P34-P36 P37-P39 P40-P42 P43-P45 P46-P48 P49-P51 P52-P54 P55-P57 P58-P60 P61-P63 P64-P66 P67-P69 P70-P72 P73-P75

P89LPC915HDH,129

Mfr. #:

Buy P89LPC915HDH,129

Manufacturer:

NXP Semiconductors

Description:

Microcontrollers - MCU 8-bit Microcontrollers - MCU 8B MCU 80C51 2KB 3V FL 8B A/D CONVRT

Lifecycle:

New from this manufacturer.

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P89LPC915HDH,129

P89LPC915HDH,129

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