IDT 89HPES24NT24G2 Datasheet
25 of 35 December 17, 2013
Absolute Maximum Voltage Rating
Warning: For proper and reliable operation in adherence with this data sheet, the device should not exceed the recommended operating voltages
in Table 16. The absolute maximum operating voltages in Table 21 are offered to provide guidelines for voltage excursions outside the recommended
voltage ranges. Device functionality is not guaranteed at these conditions and sustained operation at these values or any exposure to voltages outside
the maximum range may adversely affect device functionality and reliability.
SMBus Characterization
Capacitance C
IN
8.5 8.5 pF
Leakage Inputs + 10 + 10 AV
DD
I/O (max)
I/O
LEAK W/O
Pull-ups/downs
——+ 10 + 10 AV
DD
I/O (max)
I/O
LEAK WITH
Pull-ups/downs
——+ 80 + 80 AV
DD
I/O (max)
1.
Minimum, Typical, and Maximum values meet the requirements under PCI Express Base Specification 2.1.
Core Supply
PCIe Analog
Supply
PCIe Analog
High Supply
PCIe
Transmitter
Supply
I/O Supply
1.5V 1.5V 4.6V 1.5V 4.6V
Table 21 PES24NT24G2 Absolute Maximum Voltage Rating
Symbol Parameter
SMBus 2.0 Char. Data
1
Unit
3V 3.3V 3.6V
DC Parameter for SDA Pin
V
IL
Input Low 1.16 1.26 1.35 V
V
IH
Input High 1.56 1.67 1.78 V
V
OL@350uA
Output Low 15 15 15 mV
I
OL@0.4V
23 24 25 mA
I
Pullup
Current Source A
I
IL_Leak
Input Low Leakage 0 0 0 A
I
IH_Leak
Input High Leakage 0 0 0 A
Table 22 SMBus DC Characterization Data (Part 1 of 2)
I/O Type Parameter Description
Gen1 Gen2 Unit
Condi-
tions
Min
1
Typ
1
Max
1
Min
1
Typ
1
Max
1
Table 20 DC Electrical Characteristics (Part 3 of 3)
IDT 89HPES24NT24G2 Datasheet
26 of 35 December 17, 2013
DC Parameter for SCL Pin
V
IL (V)
Input Low 1.11 1.2 1.31 V
V
IH (V)
Input High 1.54 1.65 1.76 V
I
IL_Leak
Input Low Leakage 0 0 0 A
I
IH_Leak
Input High Leakage 0 0 0 A
1.
Data at room and hot temperature.
Symbol Parameter
SMBus @3.3V ±10%
1
1.
Data at room and hot temperature.
Unit
Min Max
F
SCL
Clock frequency 5 600 KHz
T
BUF
Bus free time between Stop and
Start
3.5 s
T
HD:STA
Start condition hold time 1 s
T
SU:STA
Start condition setup time 1 s
T
SU:STO
Stop condition setup time 1 s
T
HD:DAT
Data hold time 1 ns
T
SU:DAT
Data setup time 1 ns
T
TIMEOUT
Detect clock low time out 74.7 ms
T
LOW
2
2.
T
LOW
and
T
HIGH
are measured at F
SCL
= 135 kHz.
Clock low period 3.7 s
T
HIGH
2
Clock high period 3.7 s
T
F
Clock/Data fall time 72.2 ns
T
R
Clock/Data rise time 68.3 ns
T
POR@10kHz
Time which a device must be
operational after power-on reset
20 ms
Table 23 SMBus AC Timing Data
Symbol Parameter
SMBus 2.0 Char. Data
1
Unit
3V 3.3V 3.6V
Table 22 SMBus DC Characterization Data (Part 2 of 2)
IDT 89HPES24NT24G2 Datasheet
27 of 35 December 17, 2013
Package Pinout — 324-BGA Signal Pinout for the PES24NT24G2
The following table lists the pin numbers and signal names for the PES24NT24G2 device. Note: Pins labeled NC are No Connection.
Pin Function Alt. Pin Function Alt. Pin Function Alt.
A1 V
SS
B9 PE07TN0 C17 SSMBDAT
A2 PE08TP0 B10 PE06TN0 C18 SSMBCLK
A3 PE08TN0 B11 V
SS
D1 P08CLKP
A4 V
DD
I/O B12 GCLKN0 D2 P08CLKN
A5 STK3CFG3 B13 V
SS
D3 V
SS
A6 V
DD
I/O B14 NC D4 V
SS
A7 V
DD
I/O B15 PE05TN0 D5 STK2CFG4
A8 V
SS
B16 PE04TN0 D6 STK2CFG3
A9 PE07TP0 B17 JTAG_TDO D7 PE07RP0
A10 PE06TP0 B18 MSMBCLK D8 PE06RP0
A11 V
SS
C1 V
SS
D9 V
SS
A12 GCLKP0 C2 V
SS
D10 V
SS
A13 V
SS
C3 PE09RN0 D11 V
DD
PEHA
A14 V
SS
C4 PE09RP0 D12 V
DD
PEHA
A15 PE05TP0 C5 STK2CFG1 D13 PE05RP0
A16 PE04TP0 C6 STK3CFG1 D14 PE04RP0
A17 V
DD
I/O C7 PE07RN0 D15 JTAG_TMS
A18 V
DD
I/O C8 PE06RN0 D16 MSMBDAT
B1 PE09TP0 C9 REFRES03 D17 JTAG_TCK
B2 PE09TN0 C10 REFRESPLL D18 V
SS
B3 V
SS
C11 V
DD
PEHA E1 V
SS
B4 PE08RN0 C12 REFRES02 E2 V
SS
B5 PE08RP0 C13 PE05RN0 E3 PE10RN0
B6 STK2CFG2 C14 PE04RN0 E4 PE10RP0
B7 STK3CFG2 C15 CLKMODE1 E5 STK3CFG4
B8 V
DD
I/O C16 JTAG_TRST_N E6 V
DD
PEA
Table 24 PES24NT24G2 324-Pin Signal Pin-Out (Part 1 of 5)

89H24NT24G2ZCHLGI

Mfr. #:
Manufacturer:
IDT
Description:
PCI Interface IC PCIE SWITCH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union