VNQ5027AK-E Electrical specifications
Doc ID 12730 Rev 7 15/31
Figure 9. Output voltage drop limitation
Table 11. Truth table
Conditions Input Output Sense (V
CSD
=0V)
(1)
1. If the V
CSD
is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
V
SENSEH
Undervoltage
L
H
L
L
0
0
Short circuit to GND
(R
sc
≤ 10 mΩ)
L
H
H
L
L
L
0
0 if T
j
< T
TSD
V
SENSEH
if T
j
> T
TSD
Short circuit to V
CC
L
H
H
H
0
< Nominal
Negative output voltage
clamp
LL 0
Table 12. Electrical transient requirements (part 1/3)
ISO 7637-2:
2004(E)
test pulse
Test levels
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
III IV
1 -75 V -100 V 5000 pulses 0.5 s 5 s 2 ms, 10 Ω
2a +37 V +50 V 5000 pulses 0.2 s 5 s 50 µs, 2 Ω
3a -100 V -150 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
3b +75 V +100 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
Von
Iout
Vcc-Vout
Tj=150
o
C
Tj=25
o
C
Tj=-40
o
C
Von/Ron(T)
