P89LPC9331_9341_9351_9361 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5.1 — 20 August 2012 10 of 94
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
P2.0 to P2.7 I/O Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. During reset
Port 2 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 2 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to Section
7.16.1 “Port configurations and Table 12 “Static characteristics for details.
All pins have Schmitt trigger inputs.
Port 2 also provides various special functions as described below:
P2.0/ICB/DAC0
/AD03
1I/OP2.0 — Port 2 bit 0.
I ICB — Input Capture B. (P89LPC9351/9361)
O DAC0 — Digital-to-analog converter output.
I AD03 — ADC0 channel 3 analog input.
P2.1/OCD/AD02 2 I/O P2.1Port 2 bit 1.
O OCD — Output Compare D. (P89LPC9351/9361)
I AD02 — ADC0 channel 2 analog input.
P2.2/MOSI 13 I/O P2.2Port 2 bit 2.
I/O MOSI — SPI master out slave in. When configured as master, this pin is output;
when configured as slave, this pin is input.
P2.3/MISO 14 I/O P2.3Port 2 bit 3.
I/O MISO — When configured as master, this pin is input, when configured as slave,
this pin is output.
P2.4/SS
15 I/O P2.4 — Port 2 bit 4.
I SS
SPI Slave select.
P2.5/SPICLK 16 I/O P2.5Port 2 bit 5.
I/O SPICLK — SPI clock. When configured as master, this pin is output; when
configured as slave, this pin is input.
P2.6/OCA 27 I/O P2.6Port 2 bit 6.
O OCA — Output Compare A. (P89LPC9351/9361)
P2.7/ICA 28 I/O P2.7Port 2 bit 7.
I ICA — Input Capture A. (P89LPC9351/9361)
P3.0 to P3.1 I/O Port 3: Port 3 is a 2-bit I/O port with a user-configurable output type. During reset
Port 3 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 3 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to Section
7.16.1 “Port configurations and Table 12 “Static characteristics for details.
All pins have Schmitt trigger inputs.
Port 3 also provides various special functions as described below:
P3.0/XTAL2/
CLKOUT
9I/OP3.0 — Port 3 bit 0.
O XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is
selected via the flash configuration.
O CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK -TRIM.6).
It can be used if the CPU clock is the internal RC oscillator, watchdog oscillator or
external clock input, except when XTAL1/XTAL2 are used to generate clock source
for the RTC/system timer.
Table 3. Pin description
…continued
Symbol Pin Type Description
PLCC28,
TSSOP28
P89LPC9331_9341_9351_9361 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5.1 — 20 August 2012 11 of 94
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
[1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5.
P3.1/XTAL1 8 I/O P3.1Port 3 bit 1.
I XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when
selected via the flash configuration). It can be a port pin if internal RC oscillator or
watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not
used to generate the clock for the RTC/system timer.
V
SS
7IGround: 0 V reference.
V
DD
21 I Power supply: This is the power supply voltage for normal operation as well as
Idle and Power-down modes.
Table 3. Pin description
…continued
Symbol Pin Type Description
PLCC28,
TSSOP28
P89LPC9331_9341_9351_9361 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5.1 — 20 August 2012 12 of 94
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
7. Functional description
Remark: Please refer to the P89LPC9331/9341/9351/9361 User manual for a more
detailed functional description.
7.1 Special function registers
Remark: SFR accesses are restricted in the following ways:
User must not attempt to access any SFR locations not defined.
Accesses to any defined SFR locations must be strictly for the functions for the SFRs.
SFR bits labeled ‘-’, ‘0’ or ‘1’ can only be written and read as follows:
‘-’ Unless otherwise specified, must be written with ‘0’, but can return any value
when read (even if it was written with ‘0’). It is a reserved bit and may be used in
future derivatives.
‘0’ must be written with ‘0’, and will return a ‘0’ when read.
‘1’ must be written with ‘1’, and will return a ‘1’ when read.

P89LPC9331FDH,512

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU IC 80C51 MCU FLASH 4K
Lifecycle:
New from this manufacturer.
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