EPCQ-L Serial Configuration Devices
Datasheet
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CF52013 | 2018.05.18
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Contents
EPCQ-L Serial Configuration Devices Datasheet.................................................................. 3
Supported Devices....................................................................................................... 3
Features..................................................................................................................... 3
Operating Conditions.................................................................................................... 4
Absolute Maximum Ratings.................................................................................. 4
Recommended Operating Conditions......................................................................4
DC Operating Conditions......................................................................................5
ICC Supply Current............................................................................................. 5
Capacitance....................................................................................................... 5
Pin Information............................................................................................................6
EPCQ-L Device Pin Description.............................................................................. 7
Device Package and Ordering Code.................................................................................8
Package.............................................................................................................8
Ordering Code.................................................................................................... 8
Memory Array Organization........................................................................................... 8
Address Range for EPCQ-L256.............................................................................. 9
Address Range for EPCQ-L512............................................................................ 10
Address Range for EPCQ-L1024...........................................................................10
Memory Operations.................................................................................................... 11
Timing Requirements.........................................................................................11
Addressing Mode...............................................................................................12
Registers...................................................................................................................12
Status Register................................................................................................. 12
Flag Status Register.......................................................................................... 18
Non-Volatile Configuration Register......................................................................19
Summary of Operation Codes...................................................................................... 21
4BYTEADDREN and 4BYTEADDREX Operations (B7h and E9h)................................. 22
Write Enable Operation (06h)............................................................................. 22
Write Disable Operation (04h).............................................................................23
Read Bytes Operation (03h)................................................................................23
Fast Read Operation (Bh)................................................................................... 24
Extended Quad Input Fast Read Operation (EBh)................................................... 25
Read Device Identification Operation (9Eh or 9Fh)................................................. 26
Write Bytes Operation (02h)............................................................................... 27
Extended Quad Input Fast Write Bytes Operation (12h).......................................... 27
Erase Bulk Operation (C7h)................................................................................ 28
Erase Die Operation (C4h)..................................................................................29
Erase Sector Operation (D8h)............................................................................. 29
Power Mode...............................................................................................................30
Timing Information.....................................................................................................30
Write Operation Timing...................................................................................... 30
Read Operation Timing.......................................................................................31
Programming and Configuration File Support..................................................................31
Document Revision History for EPCQ-L Serial Configuration Devices Datasheet................... 32
Contents
EPCQ-L Serial Configuration Devices Datasheet
2
EPCQ-L Serial Configuration Devices Datasheet
Supported Devices
Table 1. EPCQ-L Devices
Device Memory Size
(bits)
On-Chip
Decompression
Support
(1)
ISP
Support
Cascading
Support
(2)
Reprogrammab
le
Recommended
Operating
Voltage (V)
Numbe
r of
Die
(256M
B)
EPCQ-
L256
268,435,456 No Yes No Yes 1.8 1
EPCQ-
L512
536,870,912 No Yes No Yes 1.8 2
EPCQ-
L1024
1,073,741,824 No Yes No Yes 1.8 4
Features
EPCQ-L devices offer the following features:
Compatibility with the Intel Stratix
®
10, Intel Arria 10, and Intel Cyclone 10 GX
devices
Native support for active serial (AS) x4
Backward compatibility for AS x1 on the Intel Arria 10 and Intel Cyclone 10 GX
devices
Low pin count and non-volatile memory
1.8-V operation
Stacked die device for the EPCQ-L512 and EPCQ-L1024 devices
Manufactured on NOR technology
Available in FBGA24 package
Reprogrammable memory with more than 100,000 erase or program cycles
More than 20 years of data retention
Write protection support for memory sectors using status register bits
Fast read and extended quad input fast read of the entire memory using a single
operation code
(1)
EPCQ-L devices are compatible with decompression built into the Intel
®
Arria
®
10 and Intel
Cyclone
®
10 GX devices.
(2)
Multiple EPCQ-L devices may be used on a single FPGA device.
CF52013 | 2018.05.18
Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus
and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other
countries. Intel warrants performance of its FPGA and semiconductor products to current specifications in
accordance with Intel's standard warranty, but reserves the right to make changes to any products and services
at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel
customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
ISO
9001:2008
Registered

EPCQL1024F24IN

Mfr. #:
Manufacturer:
Intel / Altera
Description:
FPGA - Configuration Memory
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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