MAX6917
I
2
C-Compatible RTC with Microprocessor
Supervisor, Alarm, and NV RAM Controller
26 ______________________________________________________________________________________
Battery Test
Battery-Test Normal Operation
In normal operation, the battery-test circuitry uses the
control register POR settings of INT/EXT TEST, which is
set to logic low as default (Table 1). In this mode, all bat-
tery-test load resistors and threshold settings are internal.
When V
CC
rises above V
RST
, the MAX6917 automatically
performs one power-on battery monitor test. Additionally,
a battery check is performed every time that a reset is
issued, either from a manual reset or a watchdog timeout.
After that, periodic battery voltage monitoring at the facto-
ry-programmed time interval of 24hr begins while V
CC
is
applied.
After each 24hr period (t
BTCN
) has elapsed, the
MAX6917 connects V
BATT
to an internal 0.91MΩ (typ)
test resistor (R
SET+_Int
+ R
SET-_Int
) for 1s (t
BTPW
)
(Figure 17). During this 1s, if V
BATT
falls below the fac-
tory-programmed battery trip point V
BTP
, the open-
drain, battery-low output, BATT_LO, is asserted active
low and the BATT LO bit in the status register is set to
one. The BATT LO output can be register selected to
toggle at a 1Hz rate (0.5s on, 0.5s off) when active.
Once BATT LO is active, the 24hr tests stop until a
fresh battery is inserted and BATT LO is cleared by
writing any data to the battery test register at address
0x0D (Figure 18). Writing to this register performs a
battery test and provided that the fresh battery is not
low, deactivates the BATT LO output and resets BATT
LO in the status register. Normal 24hr testing resumes.
If a different load or BATT LO thresholds are desired for
testing the backup battery, then external program resis-
tors can be used in conjunction with the TRIP and TEST
inputs (see the Battery Test-Control Register and Other
Test Options section).
Battery replacement following BATT_LO activation
should be done with V
CC
nominal and not in battery-
backup mode so that SRAM data is not lost.
Alternatively, if SRAM data need not be saved, the bat-
tery can be replaced with the V
CC
supply removed. If a
battery is replaced in battery-backup mode, sufficient
time must be allowed for the voltage on the V
OUT
out-
put to decay to zero. This ensures that the freshness-
seal mode of operation has been reset and is active
when V
CC
is powered up again. If insufficient time is
allowed, then V
CC
must exceed V
BATT
during the sub-
sequent power-up to ensure that the MAX6917 has left
battery-backup mode (Figure 19).
The MAX6917 does not constantly monitor an attached
battery because such monitoring would drastically
reduce the life of the battery. As a result, the MAX6917
