28 of 62 November 28, 2011
IDT 89HPES64H16AG2 Data Sheet
Thermal Considerations
This section describes thermal considerations for the PES64H16AG2 (35mm
2
FCBGA1156 package). The data in Table 18 below contains infor-
mation that is relevant to the thermal performance of the PES64H16AG2 switch.
Note: It is important for the reliability of this device in any user environment that the junction temperature not exceed the T
J(max)
value
specified in Table 18. Consequently, the effective junction to ambient thermal resistance (
θ
JA
) for the worst case scenario must be
maintained below the value determined by the formula:
θ
JA
= (T
J(max)
- T
A(max)
)/P
Given that the values of T
J(max)
, T
A(max)
, and P are known, the value of desired θ
JA
becomes a known entity to the system designer. How to
achieve the desired
θ
JA
is left up to the board or system designer, but in general, it can be achieved by adding the effects of θ
JC
(value
provided in Table 18), thermal resistance of the chosen adhesive (
θ
CS
), that of the heat sink (θ
SA
), amount of airflow, and properties of the
circuit board (number of layers and size of the board). It is strongly recommended that users perform their own thermal analysis for their own
board and system design scenarios.
Symbol Parameter Value Units Conditions
T
J(max)
Junction Temperature 125
o
C Maximum
T
A(max)
Ambient Temperature 70
o
C Maximum for commercial-rated products
85
o
C Maximum for industrial-rated products
θ
JA(effective)
Effective Thermal Resistance, Junction-to-Ambient
13.0
o
C/W Zero air flow
6.8
o
C/W 1 m/S air flow
5.8
o
C/W 2 m/S air flow
θ
JB
Thermal Resistance, Junction-to-Board 2.5
o
C/W
θ
JC
Thermal Resistance, Junction-to-Case 0.15
o
C/W
P Power Dissipation of the Device 13.91 Watts Maximum
Table 18 Thermal Specifications for PES64H16AG2, 35x35 mm FCBGA1156 Package
29 of 62 November 28, 2011
IDT 89HPES64H16AG2 Data Sheet
DC Electrical Characteristics
Values based on systems running at recommended supply voltages, as shown in Table 14.
Note: See Table 9, Pin Characteristics, for a complete I/O listing.
I/O Type Parameter Description
Gen1 Gen2 Unit
Condi-
tions
Min
1
Typ
1
Max
1
Min
1
Typ
1
Max
1
Serial Link PCIe Transmit
V
TX-DIFFp-p
Differential peak-to-peak output
voltage
800 1200 800 1200 mV
V
TX-DIFFp-p-LOW
Low-Drive Differential Peak to
Peak Output Voltage
400 1200 400 1200 mV
V
TX-DE-RATIO-
3.5dB
De-emphasized differential output
voltage
-3 -4 -3.0 -3.5 -4.0 dB
V
TX-DE-RATIO-
6.0dB
De-emphasized differential output
voltage
NA -5.5 -6.0 -6.5 dB
V
TX-DC-CM
DC Common mode voltage 0 3.6 0 3.6 V
V
TX-CM-ACP
RMS AC peak common mode
output voltage
20 mV
V
TX-CM-DC-active-
idle-delta
Abs delta of DC common mode
voltage between L0 and idle
100 100 mV
V
TX-CM-DC-line-
delta
Abs delta of DC common mode
voltage between D+ and D-
25 25 mV
V
TX-Idle-DiffP
Electrical idle diff peak output 20 20 mV
RL
TX-DIFF
Transmitter Differential Return
loss
10 10 dB 0.05 - 1.25GHz
8 dB 1.25 - 2.5GHz
RL
TX-CM
Transmitter Common Mode
Return loss
66dB
Z
TX-DIFF-DC
DC Differential TX impedance 80 100 120 120 Ω
VTX-CM-ACpp Peak-Peak AC Common NA 100 mV
V
TX-DC-CM
Transmit Driver DC Common
Mode Voltage
0 3.6 0 3.6 V
V
TX-RCV-DETECT
The amount of voltage change
allowed during Receiver Detec-
tion
600 600 mV
I
TX-SHORT
Transmitter Short Circuit Current
Limit
090 90mA
Table 19 DC Electrical Characteristics (Part 1 of 2)
30 of 62 November 28, 2011
IDT 89HPES64H16AG2 Data Sheet
Serial Link
(cont.)
PCIe Receive
V
RX-DIFFp-p
Differential input voltage (peak-to-
peak)
175 1200 120 1200 mV
RL
RX-DIFF
Receiver Differential Return Loss 10 10 dB 0.05 - 1.25GHz
8 1.25 - 2.5GHz
RL
RX-CM
Receiver Common Mode Return
Loss
66dB
Z
RX-DIFF-DC
Differential input impedance (DC) 80 100 120 Refer to return loss spec Ω
Z
RX--DC
DC common mode impedance 40 50 60 40 60 Ω
Z
RX-COMM-DC
Powered down input common
mode impedance (DC)
200k 350k 50k Ω
Z
RX-HIGH-IMP-DC-
POS
DC input CM input impedance for
V>0 during reset or power down
50k 50k Ω
Z
RX-HIGH-IMP-DC-
NEG
DC input CM input impedance for
V<0 during reset or power down
1.0k 1.0k Ω
V
RX-IDLE-DET-
DIFFp-p
Electrical idle detect threshold 65 175 65 175 mV
V
RX-CM-ACp
Receiver AC common-mode peak
voltage
150 150 mV V
RX-CM-ACp
PCIe REFCLK
C
IN
Input Capacitance 1.5 1.5 pF
Other I/Os
LOW Drive
Output
I
OL
—2.5——2.5 mAV
OL
= 0.4v
I
OH
—-5.5— —-5.5 mAV
OH
= 1.5V
High Drive
Output
I
OL
12.0 12.0 mA V
OL
= 0.4v
I
OH
-20.0 -20.0 mA V
OH
= 1.5V
Schmitt Trig-
ger Input
(STI)
V
IL
-0.3 0.8 -0.3 0.8 V
V
IH
2.0 V
DD
I/O +
0.5
2.0 V
DD
I/O +
0.5
V—
Input V
IL
-0.3 0.8 -0.3 0.8 V
V
IH
2.0 V
DD
I/O +
0.5
2.0 V
DD
I/O +
0.5
V—
Capacitance C
IN
8.5 8.5 pF
Leakage Inputs + 10 + 10 μAV
DD
I/O (max)
I/O
LEAK W/O
Pull-ups/downs
——+
10 + 10 μAV
DD
I/O (max)
I/O
LEAK WITH
Pull-ups/downs
——+
80 + 80 μAV
DD
I/O (max)
1.
Minimum, Typical, and Maximum values meet the requirements under PCI Specification 2.0.
I/O Type Parameter Description
Gen1 Gen2 Unit
Condi-
tions
Min
1
Typ
1
Max
1
Min
1
Typ
1
Max
1
Table 19 DC Electrical Characteristics (Part 2 of 2)

89H64H16AG2ZCBLGI

Mfr. #:
Manufacturer:
IDT
Description:
PCI Interface IC PCIE GEN2 SWITCH
Lifecycle:
New from this manufacturer.
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