AD7475/AD7495 Data Sheet
Rev. C | Page 10 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
REF IN
V
IN
GND
V
DD
V
DRIVE
SDATA
SCLK
AD7475
CS
01684-B-005
Figure 5. AD7475 SOIC/MSOP Pin Configuration
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
REF OUT
V
IN
GND
V
DD
V
DRIVE
SDATA
SCLK
AD7495
CS
01684-B-006
Figure 6. AD7495 SOIC/MSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 (AD7475) REF IN Reference Input for the AD7475. Apply an external reference to this input. The voltage range for the external
reference is 2.5 V ± 1% for specified performance. Place a capacitor of a least 0.1 µF on the REF IN pin.
1 (AD7495) REF OUT Reference Output for the AD7495. A minimum 100 nF capacitance is required from this pin to GND. The
internal reference can be taken from this pin, but buffering is required before it is applied elsewhere in a system.
2 V
IN
Analog Input. Single-ended analog input channel. The input range is 0 to REF IN.
3 GND Analog Ground. Ground reference point for all circuitry on the AD7475/AD7495. Refer all analog input signals
and any external reference signal to this GND voltage.
4 SCLK Serial Clock, Logic Input. SCLK provides the serial clock for accessing data from the device. This clock input is
also used as the clock source for the AD7475/AD7495 conversion process.
5 SDATA Data Out, Logic Output. The conversion result from the AD7475/AD7495 is provided on this output as a serial
data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream consists of four
leading zeros followed by the 12 bits of conversion data, which is provided MSB first.
6 V
DRIVE
Logic Power Supply Input. The voltage supplied at this pin determines the operating voltage for the serial
interface of the AD7475/AD7495.
7
CS
Chip Select, Active Low Logic Input. This input provides the dual function of initiating conversions on the
AD7475/AD7495 and frames the serial data transfer.
8 V
DD
Power Supply Input. The V
DD
range for the AD7475/AD7495 is from 2.7 V to 5.25 V.
Data Sheet AD7475/AD7495
Rev. C | Page 11 of 24
TERMINOLOGY
Integral Nonlinearity
The maximum deviation from a straight line passing through
the endpoints of the ADC transfer function. The endpoints of
the transfer function are zero scale, a point ½ LSB below the
first code transition, and full scale, a point ½ LSB above the last
code transition.
Differential Nonlinearity
The difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
The deviation of the first code transition (00...000) to
(00...001) from the ideal, that is, AGND + 0.5 LSB.
Gain Error
This is the deviation of the last code transition (111. ..110) to
(111...111) from the ideal (that is, V
REF
− 1.5 LSB) after the
offset error has been adjusted out.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode on the
13
th
SCLK rising edge (see the Serial Interface section). The
track-and-hold acquisition time is the minimum time required
for the track-and-hold amplifier to remain in track mode for its
output to reach and settle to within 0.5 LSB of the applied input
signal, given a step change to the input signal.
Signal-to-Noise and Distortion Ratio (SINAD)
The measured ratio of signal-to-noise and distortion at the
output of the analog-to-digital converter (ADC). The signal is
the rms amplitude of the fundamental. Noise is the sum of all
nonfundamental signals up to half the sampling frequency
(f
S
/2), excluding dc. The ratio is dependent on the number of
quantization levels in the digitization process; the more levels,
the smaller the quantization noise. The theoretical SINAD ratio
for an ideal N-bit converter with a sine wave input is given by
( ) ( )
dB76.102.6 +=+ NDistortionNoisetoSignal
For a 12-bit converter, the SINAD is 74 dB.
Total Harmonic Distortion (THD)
The ratio of the rms sum of harmonics to the fundamental. For
the AD7475/AD7495, THD is defined as
( )
1
6
54
32
V
VVVVV
THD
22222
log20dB
++++
=
where V
1
is the rms amplitude of the fundamental and V
2
, V
3
,
V
4
, V
5
, and V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
The ratio of the rms value of the next largest component in the
ADC output spectrum (up to f
S
/2 and excluding dc) to the rms
value of the fundamental. Normally, the value of this specification
is determined by the largest harmonic in the spectrum, but for
ADCs where the harmonics are buried in the noise floor, it is a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and fb,
any active device with nonlinearities creates distortion products at
sum and difference frequencies of mfa ± nfb where m, n = 0, 1,
2, 3, etc. Intermodulation distortion terms are those for which
neither m nor n is equal to zero. For example, the second-order
terms include (fa + fb) and (fa − fb), while the third-order terms
include (2fa + fb), (2fa − fb), (fa + 2fb), and (fa − 2fb).
The AD7475/AD7495 are tested using the CCIF standard where
two input frequencies near the top end of the input bandwidth
are used. In this case, the second-order terms are usually distanced
in frequency from the original sine waves while the third order
terms are usually at a frequency close to the input frequencies.
As a result, the second- and third-order terms are specified
separately. Like THD, intermodulation distortion is calculated
as the rms sum of the individual distortion products to the rms
amplitude of the sum of the fundamentals, expressed in dBs.
AD7475/AD7495 Data Sheet
Rev. C | Page 12 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 7 shows a typical FFT plot for the AD7475 at a 1 MHz sample rate and a 100 kHz input frequency. Figure 8 shows a typical FFT
plot for the AD7495 at a 1 MHz sample rate and a 100 kHz input frequency. Figure 9 shows the SINAD performance vs. input frequency
for various supply voltages while sampling at 1 MSPS with an SCLK of 20 MHz.
FREQUENCY (kHz)
–115
0
SINAD (dB)
50 100 150 200 250 300
–95
–75
–55
–35
350 400 500450
–15
8192 POINT FFT
f
SAMPLE
= 1MSPS
f
IN
= 100kHz
SINAD = 70.46dB
THD = –87.7dB
SFDR = –89.5dB
01684-B-007
Figure 7. AD7475 Dynamic Performance
FREQUENCY (kHz)
–115
0
SINAD (dB)
50 100 150 200 250 300
–95
–75
–55
–35
350 400 500450
–15
8192 POINT FFT
f
SAMPLE
= 1MSPS
f
IN
= 100kHz
SINAD = 69.95dB
THD = –89.2dB
SFDR = –91.2dB
01684-B-008
Figure 8. AD7495 Dynamic Performance
INPUT FREQUENCY (kHz)
68.5
SINAD (dB)
10 100
69.0
69.5
70.0
70.5
1000
71.0
V
DD
= V
DRIVE
= 5.25V
V
DD
= V
DRIVE
= 3.60V
V
DD
= V
DRIVE
= 2.70V
V
DD
= V
DRIVE
= 4.75V
01684-B-009
Figure 9. AD7495 SINAD vs. Input Frequency at 1 MSPS

AD7475ARMZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC IC 1 MSPS 12-Bit
Lifecycle:
New from this manufacturer.
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