NCP81119
http://onsemi.com
17
General
The NCP81119 is a four phase dual edge modulated multiphase PWM controller, designed to meet the Intel VR12.5
specifications with a serial SVID control interface. The NCP81119 implements PS0, PS1, PS2 and PS3 power saving states.
It is designed to work in notebook, desktop, and server applications.
Power Status PWM Output Operating Mode
PS0 Multi−phase PWM interleaving output
PS1 Single−phase RPM CCM mode (PWM1 or PWM3, PWM2~4 stay in Mid)
PS2 Single−phase RPM DCM mode (PWM1 only, PWM2~4 stay in Mid)
PS3 Single−phase RPM DCM mode (PWM1 only, PWM2~4 stay in Mid)
Serial VID interface (SVID)
The Serial VID Interface (SVID Interface) is a 3 wire digital interface used to transfer power management information
between the CPU (Master) and the NCP81119 (Slave). The 3 wires are clock (SCLK), data (SDIO) and ALERT#. The SCLK
is unidirectional and generated by the master. The SDIO is bi−directional, used for transferring data from the CPU to the
NCP81119 and from the NCP81119 to the CPU. The ALERT# is an open drain output from the NCP81119 to signal to the
master that the Status Register should be read.
SCLK, SDIO and ALERT# should be pulled high to CPU I/O voltage VTT (which is typically 1.0 to 1.1 V) using 55 W
Resistors. The SVID bus will operate at a max frequency of 43 MHz.
VID code change is supported by SVID interface with three options as below:
Option
SVID Command
Code
Feature
Register Address
(Indicating the slew rate of VID code change)
SetVID_Fast 01h
>10 mV/ms VID code change slew
rate
24h
SetVID_Slow 02h =1/4 of SetVID_Fast VID code
change slew rate
25h
SetVID_Decay 03h No control, VID code down N/A
Serial VID
The NCP81119 supports the Intel serial VID interface. It communicates with the microprocessor through three wires (SCLK,
SDIO, ALERT#). The table of supported registers is shown below.
Index Name Description Access Default
00h Vendor ID Uniquely identifies the VR vendor. The vendor ID assigned by Intel to
ON Semiconductor is 0x1Ah
R 0x1Ah
01h Product ID Uniquely identifies the VR product. The VR vendor assigns this
number.
R 0x12
02h Product Revision Uniquely identifies the revision or stepping of the VR control IC. The
VR vendor assigns this data.
R 0x04
03h Product date code
ID
R 00
05h Protocol ID Identifies the SVID Protocol the controller supports R 0x02
06h Capability Informs the Master of the controller’s Capabilities, 1 = supported, 0 =
not supported
Bit 7 = Iout_format. Bit 7 = 0 when 1A = 1LSB of Reg 15h. Bit 7 = 1
when Reg 15 FFh = Icc_Max. Default = 1
Bit 6 = ADC Measurement of Temp Supported = 1
Bit 5 = ADC Measurement of Pin Supported = 0
Bit 4 = ADC Measurement of Vin Supported = 1
Bit 3 = ADC Measurement of Iin Supported = 0
Bit 2 = ADC Measurement of Pout Supported = 1
Bit 1 = ADC Measurement of Vout Supported = 1
Bit 0 = ADC Measurement of Iout Supported = 1
R 0xD7
10h Status_1 Data register read after the ALERT# signal is asserted. Conveying
the status of the VR.
R 00h
