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BOOT VOLTAGE TABLE
R Phase Number in PS1VBoot
69.8k 1.70 V 1
90.9k 1.75 V 1
130k 0 V 2
150k 1.65 V 2
169k 1.70 V 2
Open 1.75 V 2
Remote Sense Amplifier
A high performance high input impedance true differential amplifier is provided to accurately sense the output voltage of
the regulator. The VSP and VSN inputs should be connected to the regulators output voltage sense points. The remote sense
amplifier takes the difference of the output voltage with the DAC voltage and adds the droop voltage to
V
DIFOUT
+
ǒ
V
VSP
* V
VSN
Ǔ
)
ǒ
1.3 V * V
DAC
Ǔ
)
ǒ
V
DROOP
* V
CSREF
Ǔ
This signal then goes through a standard error compensation network and into the inverting input of the error amplifier. The
noninverting input of the error amplifier is connected to the same 1.3 V reference used for the differential sense amplifier
output bias.
Addressing Programming
The NCP81119 supports 9 possible SVID device addresses. Pin 12 (PWM1/ADDR) is used to set the SVID address. On
power up a 10uA current is sourced from this pin through a resistor connected to this pin and the resulting voltage is measured.
Table below provides the resistor values for each corresponding SVID address. The address value is latched at startup.
SVID Address Table
Missing SVID Table
Resistor Value SVID Address
10 k 0000
22 k 0001
36 k 0010
51 k 0011
68 k 0100
91 k 0101
120 k 0110
160 k 0111
220 k 1000
Differential Current Feedback Amplifiers
Each phase has a low offset differential amplifier to sense that phase current for current balance. The inputs to the CSNx and
CSPx pins are high impedance inputs. It is recommended that any external filter resistor RCSN does not exceed 10 kW to avoid
offset issues with leakage current. It is also recommended that the voltage sense element be no less than 0.5 mW for accurate
current balance. Fine tuning of this time constant is generally not required. The individual phase current is summed into the
PWM comparator feedback this way current is balanced via a current mode control approach.
CCSNRCSN
DCR LPHASE
1 2
SWNx VOUT
CSPx
CSNx
R
CSN
+
L
PHASE
C
CSN
* DCR
Figure 6.
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Total Current Sense Amplifier
The NCP81119 uses a patented approach to sum the phase currents into a single temperature compensated total current signal.
This signal is then used to generate the output voltage droop, total current limit, and the output current monitoring functions.
The total current signal is floating with respect to CSREF. The current signal is the difference between CSCOMP and CSREF.
The Ref(n) resistors sum the signals from the output side of the inductors to create a low impedance virtual ground, the capacitor
is used to ensure that the CSREF voltage signal integrity. The amplifier actively filters and gains up the voltage applied across
the inductors to recover the voltage drop across the inductor series resistance (DCR). Rth is placed near an inductor to sense
the temperature of the inductor. This allows the filter time constant and gain to be a function of the Rth NTC resistor and
compensate for the change in the DCR with temperature.
+
U1A
Rph4
Rph3
Rph2
Rph1
Rref4 10
Rfer3 10
Rref2 10
Rref1 10
R9
R
R10
R
Cref
1nF
Ccs1
Ccs2
t
RT1
100k
CSREF
CSN2
CSN1
CSN4
CSN3
SWN2
SWN1
SWN4
SWN3
0
CSSUM
CSCOMP
Figure 7.
The DC gain equation for the current sensing:
V
CSCOMPCSREF
+
Rcs2 )
Rcs1*Rth
Rcs1)Rth
Rph
*
ǒ
Iout
Total
* DCR
Ǔ
Set the gain by adjusting the value of the Rph resistors. The DC gain should be set to the output voltage droop. If the voltage
from CSCOMP to CSREF is less than 100 mV at ICCMAX then it is recommend increasing the gain of the CSCOMP amp.
This is required to provide a good current signal to offset voltage ratio for the ILIMIT pin. When no droop is needed, the gain
of the amplifier should be set to provide ~100mV across the current limit programming resistor at full load. The values of Rcs1
and Rcs2 are set based on the 100k NTC and the temperature effect of the inductor and should not need to be changed. The
NTC should be placed near the closest inductor. The output voltage droop should be set with the droop filter divider.
The pole frequency in the CSCOMP filter should be set equal to the zero from the output inductor. This allows the circuit
to recover the inductor DCR voltage drop current signal. Ccs1 and Ccs2 are in parallel to allow for fine tuning of the time
constant using commonly available values. It is best to fine tune this filter during transient testing.
F
z
+
DCR@25° C
2*PI*L
Phase
Programming the Current Limit
The current limit thresholds are programmed with a resistor between the ILIMIT and CSCOMP pins. The ILIMIT pin mirrors
the voltage at the CSREF pin and mirrors the sink current internally to IOUT (reduced by the IOUT Current Gain) and the
current limit comparators. The 100% current limit trips if the ILIMIT sink current exceeds 10 mA for 50 ms. The 150% current
limit trips with minimal delay if the ILIMIT sink current exceeds 15 mA. Set the value of the current limit resistor based on
the CSCOMPCSREF voltage as shown below.
R
LIMIT
+
Rcs2)
Rcs1*Rth
Rcs1)Rth
Rph
*
ǒ
Iout
LIMIT
* DCR
Ǔ
10m
or R
LIMIT
+
lV
CSCOMPCSREF@ILIMIT
10m
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Programming IOUT
The IOUT pin sources a current in proportion to the ILIMIT sink current. The voltage on the IOUT pin is monitored by the
internal A/D converter and should be scaled with an external resistor to ground such that a load equal to ICCMAX generates
a 2 V signal on IOUT. A pullup resistor from 5 V V
CC
can be used to offset the IOUT signal positive if needed.
R
IOUT
+
2.0 V * R
LIMIT
10 *
Rcs2)
Rcs1*Rth
Rcs1)Rth
Rph
*
ǒ
Iout
ICC_MAX
* DCR
Ǔ
Programming ICC_MAX
The SVID interface provides the platform ICC_MAX value at register 21h for. A resistor to ground on the IMAX pin
programs these registers at the time the part is enabled. 10 mA is sourced from these pins to generate a voltage on the program
resistor. The value of the register is 1 A per LSB and is set by the equation below. The resistor value should be no less than 10k.
ICC_MAX
21h
+
R*10mA * 256 A
2V
Programming TSENSE
A temperature sense inputs are provided. A precision current is sourced out the output of the TSENSE pin to generate a
voltage on the temperature sense network. The voltage on the temperature sense input is sampled by the internal A/D converter.
A 100k NTC similar to the VISHAY ERTJ1VS104JA should be used. Rcomp1 is mainly used for noise. See the specification
table for the thermal sensing voltage thresholds and source current.
Rcomp2
8.2K
RNTC
100K
Cfilter
0.1uF
AGNDAGND
Rcomp1
0.0
TSENSE
Figure 8.
Precision Oscillator
A programmable precision oscillator is provided. The clock oscillator serves as the master clock to the ramp generator circuit.
This oscillator is programmed by a resistor to ground on the ROSC pin. The oscillator frequency range is between 280 kHz
to 650 kHz on the NCP81119 The graph below lists the resistor options and associated frequency setting.

NCP81119MNTXG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Voltage Regulators VR CONTROLLER
Lifecycle:
New from this manufacturer.
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